DE69934637D1 - Ferroelektrischer Speicher und seine Testverfahren - Google Patents

Ferroelektrischer Speicher und seine Testverfahren

Info

Publication number
DE69934637D1
DE69934637D1 DE69934637T DE69934637T DE69934637D1 DE 69934637 D1 DE69934637 D1 DE 69934637D1 DE 69934637 T DE69934637 T DE 69934637T DE 69934637 T DE69934637 T DE 69934637T DE 69934637 D1 DE69934637 D1 DE 69934637D1
Authority
DE
Germany
Prior art keywords
test methods
ferroelectric memory
ferroelectric
memory
test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69934637T
Other languages
English (en)
Other versions
DE69934637T2 (de
Inventor
Chikai Ono
Yamazaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Semiconductor Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE69934637D1 publication Critical patent/DE69934637D1/de
Application granted granted Critical
Publication of DE69934637T2 publication Critical patent/DE69934637T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/22Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using ferroelectric elements

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Dram (AREA)
  • Tests Of Electronic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
DE69934637T 1998-08-25 1999-04-23 Ferroelektrischer Speicher und seine Testverfahren Expired - Lifetime DE69934637T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP23786098A JP3780713B2 (ja) 1998-08-25 1998-08-25 強誘電体メモリ、強誘電体メモリの製造方法及び強誘電体メモリの試験方法
JP23786098 1998-08-25

Publications (2)

Publication Number Publication Date
DE69934637D1 true DE69934637D1 (de) 2007-02-15
DE69934637T2 DE69934637T2 (de) 2007-05-03

Family

ID=17021497

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69934637T Expired - Lifetime DE69934637T2 (de) 1998-08-25 1999-04-23 Ferroelektrischer Speicher und seine Testverfahren

Country Status (5)

Country Link
US (1) US6229728B1 (de)
EP (1) EP0986066B1 (de)
JP (1) JP3780713B2 (de)
KR (1) KR100326991B1 (de)
DE (1) DE69934637T2 (de)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001093988A (ja) * 1999-07-22 2001-04-06 Sony Corp 半導体記憶装置
JP3928837B2 (ja) * 1999-09-13 2007-06-13 株式会社ルネサステクノロジ 半導体集積回路装置
JP2001118999A (ja) * 1999-10-15 2001-04-27 Hitachi Ltd ダイナミック型ramと半導体装置
JP2001256774A (ja) * 2000-03-09 2001-09-21 Matsushita Electric Ind Co Ltd 半導体記憶装置のデータ読み出し方法、データ書き込み方法および駆動方法
JP2001291385A (ja) * 2000-04-05 2001-10-19 Nec Corp 半導体記憶装置並びにその試験装置および試験方法
WO2002052572A1 (en) * 2000-12-27 2002-07-04 International Business Machines Corporation Static 2t-1c ferroelectric memory
JP2002216498A (ja) * 2001-01-18 2002-08-02 Rohm Co Ltd 強誘電体記憶装置
EP1349030A1 (de) * 2001-12-20 2003-10-01 Matsushita Electric Industrial Co., Ltd. Potentialerzeugungsschaltung, potentialerzeugungs vorrichtung, halbleiterbauelement damit und ansteuerverfahren dafür
US6920060B2 (en) * 2002-08-14 2005-07-19 Intel Corporation Memory device, circuits and methods for operating a memory device
KR100482996B1 (ko) * 2002-08-30 2005-04-15 주식회사 하이닉스반도체 비휘발성 강유전체 메모리 장치
US6744087B2 (en) 2002-09-27 2004-06-01 International Business Machines Corporation Non-volatile memory using ferroelectric gate field-effect transistors
US6894916B2 (en) 2002-09-27 2005-05-17 International Business Machines Corporation Memory array employing single three-terminal non-volatile storage elements
US6731554B1 (en) * 2002-11-20 2004-05-04 Infineon Technologies Ag 2T2C signal margin test mode using resistive element
JP3806084B2 (ja) * 2002-12-25 2006-08-09 株式会社東芝 強誘電体メモリ及びそのデータ読み出し方法
KR100506459B1 (ko) * 2003-09-08 2005-08-05 주식회사 하이닉스반도체 불휘발성 강유전체 메모리 장치
JP2006024263A (ja) * 2004-07-07 2006-01-26 Seiko Epson Corp 強誘電体記憶装置、電子機器
JP4638193B2 (ja) 2004-09-24 2011-02-23 パトレネラ キャピタル リミテッド, エルエルシー メモリ
WO2017145530A1 (ja) * 2016-02-22 2017-08-31 株式会社村田製作所 圧電デバイス

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4468759A (en) * 1982-05-03 1984-08-28 Intel Corporation Testing method and apparatus for dram
KR930002470B1 (ko) * 1989-03-28 1993-04-02 가부시키가이샤 도시바 전기적인 독출/기록동작이 가능한 불휘발성 반도체기억장치 및 그 정보독출방법
JP3110032B2 (ja) 1990-03-30 2000-11-20 株式会社東芝 強誘電体メモリ
JPH05144296A (ja) * 1991-11-20 1993-06-11 Toshiba Corp 半導体記憶装置の検査方法
JP3191549B2 (ja) * 1994-02-15 2001-07-23 松下電器産業株式会社 半導体メモリ装置
JP3397452B2 (ja) * 1994-07-06 2003-04-14 東芝マイクロエレクトロニクス株式会社 半導体記憶装置
JP3226433B2 (ja) * 1994-09-22 2001-11-05 松下電器産業株式会社 強誘電体メモリ装置
JPH08203266A (ja) * 1995-01-27 1996-08-09 Nec Corp 強誘電体メモリ装置
JPH097377A (ja) * 1995-06-20 1997-01-10 Sony Corp 強誘電体記憶装置
SG79200A1 (en) * 1995-08-21 2001-03-20 Matsushita Electric Ind Co Ltd Ferroelectric memory devices and method for testing them
US5680344A (en) * 1995-09-11 1997-10-21 Micron Technology, Inc. Circuit and method of operating a ferrolectric memory in a DRAM mode
US5610867A (en) * 1995-09-28 1997-03-11 International Business Machines Corporation DRAM signal margin test method
JPH09180467A (ja) * 1995-10-24 1997-07-11 Fujitsu Ltd 強誘電体メモリにおけるデータの読出し方法及び強誘電体メモリ
US5764561A (en) * 1995-11-16 1998-06-09 Rohm Co., Ltd. Ferroelectric memory devices and method of using ferroelectric capacitors
US5844832A (en) * 1996-08-22 1998-12-01 Samsung Electronics Co., Ltd. Cell array structure for a ferroelectric semiconductor memory and a method for sensing data from the same
KR100268444B1 (ko) * 1997-08-30 2000-10-16 윤종용 강유전체 랜덤 액세스 메모리 장치
JPH11273360A (ja) * 1998-03-17 1999-10-08 Toshiba Corp 強誘電体記憶装置

Also Published As

Publication number Publication date
JP2000067597A (ja) 2000-03-03
EP0986066A2 (de) 2000-03-15
EP0986066A3 (de) 2000-09-13
KR20000016863A (ko) 2000-03-25
KR100326991B1 (ko) 2002-03-04
US6229728B1 (en) 2001-05-08
DE69934637T2 (de) 2007-05-03
JP3780713B2 (ja) 2006-05-31
EP0986066B1 (de) 2007-01-03

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU MICROELECTRONICS LTD., TOKYO, JP

8327 Change in the person/name/address of the patent owner

Owner name: FUJITSU SEMICONDUCTOR LTD., YOKOHAMA, KANAGAWA, JP

8328 Change in the person/name/address of the agent

Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE