DE69931590D1 - Gegen Analyse geschützte Halbleiteranordnung - Google Patents

Gegen Analyse geschützte Halbleiteranordnung

Info

Publication number
DE69931590D1
DE69931590D1 DE69931590T DE69931590T DE69931590D1 DE 69931590 D1 DE69931590 D1 DE 69931590D1 DE 69931590 T DE69931590 T DE 69931590T DE 69931590 T DE69931590 T DE 69931590T DE 69931590 D1 DE69931590 D1 DE 69931590D1
Authority
DE
Germany
Prior art keywords
semiconductor device
protected semiconductor
analysis
analysis protected
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69931590T
Other languages
English (en)
Other versions
DE69931590T2 (de
Inventor
Hironori Matsumoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Application granted granted Critical
Publication of DE69931590D1 publication Critical patent/DE69931590D1/de
Publication of DE69931590T2 publication Critical patent/DE69931590T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including only semiconductor components of a single kind
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/57Protection from inspection, reverse engineering or tampering
    • H01L23/573Protection from inspection, reverse engineering or tampering using passive means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S257/00Active solid-state devices, e.g. transistors, solid-state diodes
    • Y10S257/922Active solid-state devices, e.g. transistors, solid-state diodes with means to prevent inspection of or tampering with an integrated circuit, e.g. "smart card", anti-tamper

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Formation Of Insulating Films (AREA)
  • Semiconductor Memories (AREA)
DE69931590T 1998-12-21 1999-12-21 Gegen Analyse geschützte Halbleiteranordnung Expired - Lifetime DE69931590T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP36233598 1998-12-21
JP36233598A JP3583633B2 (ja) 1998-12-21 1998-12-21 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
DE69931590D1 true DE69931590D1 (de) 2006-07-06
DE69931590T2 DE69931590T2 (de) 2007-05-16

Family

ID=18476591

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69931590T Expired - Lifetime DE69931590T2 (de) 1998-12-21 1999-12-21 Gegen Analyse geschützte Halbleiteranordnung

Country Status (6)

Country Link
US (2) US20020167073A1 (de)
EP (1) EP1014446B1 (de)
JP (1) JP3583633B2 (de)
KR (1) KR100365662B1 (de)
DE (1) DE69931590T2 (de)
TW (1) TW432535B (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10105725B4 (de) 2001-02-08 2008-11-13 Infineon Technologies Ag Halbleiterchip mit einem Substrat, einer integrierten Schaltung und einer Abschirmvorrichtung
GB0410975D0 (en) 2004-05-17 2004-06-16 Nds Ltd Chip shielding system and method
JP2007266083A (ja) * 2006-03-27 2007-10-11 Renesas Technology Corp 半導体装置およびその製造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2579142B2 (ja) 1984-08-22 1997-02-05 三菱電機株式会社 樹脂封止型半導体装置
JPH0715990B2 (ja) 1985-09-11 1995-02-22 三菱電機株式会社 半導体装置
JPS6436032A (en) 1987-07-30 1989-02-07 Sumitomo Electric Industries Semiconductor device
JPH01165129A (ja) * 1987-12-21 1989-06-29 Sharp Corp 集積回路
JPH01214126A (ja) 1988-02-23 1989-08-28 Nec Corp 半導体装置
JPH01286454A (ja) 1988-05-13 1989-11-17 Hitachi Ltd 半導体装置
JPH02209735A (ja) 1989-02-09 1990-08-21 Seiko Epson Corp 半導体装置
DE4210884C2 (de) 1991-04-09 2000-10-05 Clariant Finance Bvi Ltd Cobalt- und Nickel-freie Verdichtungs-Zubereitungen
US5369299A (en) * 1993-07-22 1994-11-29 National Semiconductor Corporation Tamper resistant integrated circuit structure
US5468990A (en) 1993-07-22 1995-11-21 National Semiconductor Corp. Structures for preventing reverse engineering of integrated circuits
JPH095770A (ja) 1995-06-26 1997-01-10 Fuji Electric Co Ltd 半導体集積装置
US5920112A (en) * 1998-04-07 1999-07-06 Micro Networks Corporation Circuit including a corral for containing a protective coating, and method of making same
US6107199A (en) * 1998-10-24 2000-08-22 International Business Machines Corporation Method for improving the morphology of refractory metal thin films

Also Published As

Publication number Publication date
US20020167073A1 (en) 2002-11-14
JP2000183291A (ja) 2000-06-30
EP1014446A1 (de) 2000-06-28
JP3583633B2 (ja) 2004-11-04
US6720656B2 (en) 2004-04-13
EP1014446B1 (de) 2006-05-31
DE69931590T2 (de) 2007-05-16
KR100365662B1 (ko) 2002-12-26
US20030107135A1 (en) 2003-06-12
TW432535B (en) 2001-05-01
KR20000048251A (ko) 2000-07-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition