DE69907704D1 - Speichersteuerungsvorrichtung mit programmierbarem verzögerungszähler zur leistungsabstimmung in abhängigkeit von zeitparametern des gesteuerten speichergeräts - Google Patents

Speichersteuerungsvorrichtung mit programmierbarem verzögerungszähler zur leistungsabstimmung in abhängigkeit von zeitparametern des gesteuerten speichergeräts

Info

Publication number
DE69907704D1
DE69907704D1 DE69907704T DE69907704T DE69907704D1 DE 69907704 D1 DE69907704 D1 DE 69907704D1 DE 69907704 T DE69907704 T DE 69907704T DE 69907704 T DE69907704 T DE 69907704T DE 69907704 D1 DE69907704 D1 DE 69907704D1
Authority
DE
Germany
Prior art keywords
control device
programmable delay
time parameters
delay counter
performance adjustment
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69907704T
Other languages
English (en)
Inventor
Paul Mcclannahan
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Application granted granted Critical
Publication of DE69907704D1 publication Critical patent/DE69907704D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668—Details of memory controller
    • G06F13/1694—Configuration of memory controller to different memory types

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Dram (AREA)
DE69907704T 1998-10-02 1999-03-10 Speichersteuerungsvorrichtung mit programmierbarem verzögerungszähler zur leistungsabstimmung in abhängigkeit von zeitparametern des gesteuerten speichergeräts Expired - Lifetime DE69907704D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/166,004 US6438670B1 (en) 1998-10-02 1998-10-02 Memory controller with programmable delay counter for tuning performance based on timing parameter of controlled memory storage device
PCT/US1999/005175 WO2000020978A1 (en) 1998-10-02 1999-03-10 Memory controller with programmable delay counter for tuning performance based on timing parameter of controlled memory storage device

Publications (1)

Publication Number Publication Date
DE69907704D1 true DE69907704D1 (de) 2003-06-12

Family

ID=22601388

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69907704T Expired - Lifetime DE69907704D1 (de) 1998-10-02 1999-03-10 Speichersteuerungsvorrichtung mit programmierbarem verzögerungszähler zur leistungsabstimmung in abhängigkeit von zeitparametern des gesteuerten speichergeräts

Country Status (6)

Country Link
US (3) US6438670B1 (de)
EP (1) EP1116123B1 (de)
JP (1) JP2002526861A (de)
KR (1) KR100450726B1 (de)
DE (1) DE69907704D1 (de)
WO (1) WO2000020978A1 (de)

Families Citing this family (130)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6539440B1 (en) * 1998-11-16 2003-03-25 Infineon Ag Methods and apparatus for prediction of the time between two consecutive memory accesses
US6519716B1 (en) * 1999-09-22 2003-02-11 International Business Machines Corporation Electronic device initialization with dynamic selection of access time for non-volatile memory
US6684314B1 (en) * 2000-07-14 2004-01-27 Agilent Technologies, Inc. Memory controller with programmable address configuration
KR100389916B1 (ko) * 2000-08-28 2003-07-04 삼성전자주식회사 메모리 모듈 및 메모리 컨트롤러
KR100501779B1 (ko) * 2000-12-08 2005-07-20 후지쯔 가부시끼가이샤 메모리 회로 시험 시스템, 반도체 장치 및 메모리 시험 방법
JP4922480B2 (ja) * 2000-12-19 2012-04-25 株式会社アドバンテスト 半導体デバイス試験装置
US6553472B2 (en) * 2001-01-12 2003-04-22 Sun Microsystems, Inc. Method for programming clock delays, command delays, read command parameter delays, and write command parameter delays of a memory controller in a high performance microprocessor
US6934871B2 (en) * 2001-05-17 2005-08-23 Lsi Logic Corporation Programmable counters for setting bus arbitration delays involves counting clock cycles equal to a count number loaded from a memory
KR100432218B1 (ko) 2001-07-28 2004-05-22 삼성전자주식회사 데이타 액세스 타이밍을 조정하는 듀얼 포트 메모리콘트롤러
US6424198B1 (en) * 2001-08-09 2002-07-23 International Business Machines Corporation Memory clock generation with configurable phase advance and delay capability
FR2829253A1 (fr) * 2001-08-31 2003-03-07 Koninkl Philips Electronics Nv Controle d'acces dynamique d'une fonction a ressource collective
US6779096B1 (en) * 2001-09-29 2004-08-17 Apple Computer, Inc. Method and apparatus for a calibrated variable phase offset timing between synchronous clock subdomains
US6941416B2 (en) * 2001-10-04 2005-09-06 Zilog, Inc. Apparatus and methods for dedicated command port in memory controllers
US20040098549A1 (en) * 2001-10-04 2004-05-20 Dorst Jeffrey R. Apparatus and methods for programmable interfaces in memory controllers
US6823405B1 (en) * 2001-10-15 2004-11-23 Advanced Mirco Devices, Inc. Method and apparatus for initiating partial transactions in a peripheral interface circuit for an I/O node of a computer system
US6594748B1 (en) * 2001-11-09 2003-07-15 Lsi Logic Corporation Methods and structure for pipelined read return control in a shared RAM controller
KR100454126B1 (ko) * 2002-01-15 2004-10-26 삼성전자주식회사 분리된 클록 라인을 구비한 정보 처리 시스템
US6934899B2 (en) * 2002-01-30 2005-08-23 Etron Technology, Inc. Variable self-time scheme for write recovery by low speed tester
US6778175B2 (en) * 2002-02-05 2004-08-17 Xgi Technology Inc. Method of arbitration of memory request for computer graphics system
JP3800164B2 (ja) 2002-10-18 2006-07-26 ソニー株式会社 情報処理装置、情報記憶装置、情報処理方法、及び情報処理プログラム
US20040203483A1 (en) * 2002-11-07 2004-10-14 International Business Machines Corporation Interface transceiver power mangagement method and apparatus
US7043611B2 (en) * 2002-12-11 2006-05-09 Lsi Logic Corporation Reconfigurable memory controller
US7096349B1 (en) * 2002-12-16 2006-08-22 Advanced Micro Devices, Inc. Firmware algorithm for initializing memory modules for optimum performance
KR100560646B1 (ko) * 2002-12-20 2006-03-16 삼성전자주식회사 지연된 오토프리챠지 기능을 갖는 반도체 메모리 장치
JP2004213337A (ja) * 2002-12-27 2004-07-29 Nec Computertechno Ltd 半導体記憶装置及び実装型半導体装置
US6925542B2 (en) * 2003-03-21 2005-08-02 Freescale Semiconductor, Inc. Memory management in a data processing system
JP4792196B2 (ja) * 2003-03-27 2011-10-12 三洋電機株式会社 データ入出力方法、およびその方法を利用可能な記憶装置およびホスト装置
US7210059B2 (en) * 2003-08-19 2007-04-24 Micron Technology, Inc. System and method for on-board diagnostics of memory modules
US20050041453A1 (en) * 2003-08-22 2005-02-24 Brazis Paul W. Method and apparatus for reading and writing to solid-state memory
US7310752B2 (en) 2003-09-12 2007-12-18 Micron Technology, Inc. System and method for on-board timing margin testing of memory modules
US7433258B2 (en) * 2003-10-10 2008-10-07 Datasecure Llc. Posted precharge and multiple open-page RAM architecture
US7120743B2 (en) 2003-10-20 2006-10-10 Micron Technology, Inc. Arbitration system and method for memory responses in a hub-based memory system
US6940768B2 (en) * 2003-11-04 2005-09-06 Agere Systems Inc. Programmable data strobe offset with DLL for double data rate (DDR) RAM memory
US6829191B1 (en) 2003-12-03 2004-12-07 Hewlett-Packard Development Company, L.P. Magnetic memory equipped with a read control circuit and an output control circuit
US7216196B2 (en) * 2003-12-29 2007-05-08 Micron Technology, Inc. Memory hub and method for memory system performance monitoring
KR100546403B1 (ko) * 2004-02-19 2006-01-26 삼성전자주식회사 감소된 메모리 버스 점유 시간을 가지는 시리얼 플레쉬메모리 컨트롤러
US7310748B2 (en) * 2004-06-04 2007-12-18 Micron Technology, Inc. Memory hub tester interface and method for use thereof
JP4616586B2 (ja) * 2004-06-30 2011-01-19 富士通株式会社 メモリ初期化制御装置
TWI245287B (en) * 2004-09-08 2005-12-11 Via Tech Inc Method for initialization drams
CN100395740C (zh) * 2004-11-03 2008-06-18 明基电通股份有限公司 通用型串行传输系统、打印机及其控制方法
US7139673B1 (en) * 2004-11-05 2006-11-21 Xilinx, Inc. Method of and circuit for verifying a data transfer protocol
JP2006134196A (ja) * 2004-11-09 2006-05-25 Hitachi Ltd ディスクアレイ装置
US8099638B2 (en) * 2004-11-12 2012-01-17 Ati Technologies Ulc Apparatus and methods for tuning a memory interface
US20060136606A1 (en) * 2004-11-19 2006-06-22 Guzy D J Logic device comprising reconfigurable core logic for use in conjunction with microprocessor-based computer systems
US7650481B2 (en) * 2004-11-24 2010-01-19 Qualcomm Incorporated Dynamic control of memory access speed
US7532218B1 (en) * 2005-02-01 2009-05-12 Nvidia Corporation Method and apparatus for memory training concurrent with data transfer operations
US8881233B2 (en) * 2005-05-23 2014-11-04 Microsoft Corporation Resource management via periodic distributed time
US7515453B2 (en) 2005-06-24 2009-04-07 Metaram, Inc. Integrated memory core and memory interface circuit
US9171585B2 (en) 2005-06-24 2015-10-27 Google Inc. Configurable memory circuit system and method
US8397013B1 (en) 2006-10-05 2013-03-12 Google Inc. Hybrid memory module
US8335894B1 (en) 2008-07-25 2012-12-18 Google Inc. Configurable memory system with interface circuit
US20080028136A1 (en) 2006-07-31 2008-01-31 Schakel Keith R Method and apparatus for refresh management of memory modules
US8060774B2 (en) 2005-06-24 2011-11-15 Google Inc. Memory systems and memory modules
US8438328B2 (en) 2008-02-21 2013-05-07 Google Inc. Emulation of abstracted DIMMs using abstracted DRAMs
US20080082763A1 (en) 2006-10-02 2008-04-03 Metaram, Inc. Apparatus and method for power management of memory circuits by a system or component thereof
US8089795B2 (en) 2006-02-09 2012-01-03 Google Inc. Memory module with memory stack and interface with enhanced capabilities
US7386656B2 (en) 2006-07-31 2008-06-10 Metaram, Inc. Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
US8090897B2 (en) 2006-07-31 2012-01-03 Google Inc. System and method for simulating an aspect of a memory circuit
US7609567B2 (en) * 2005-06-24 2009-10-27 Metaram, Inc. System and method for simulating an aspect of a memory circuit
US8111566B1 (en) 2007-11-16 2012-02-07 Google, Inc. Optimal channel design for memory devices for providing a high-speed memory interface
US8359187B2 (en) 2005-06-24 2013-01-22 Google Inc. Simulating a different number of memory circuit devices
US8796830B1 (en) 2006-09-01 2014-08-05 Google Inc. Stackable low-profile lead frame package
US8081474B1 (en) 2007-12-18 2011-12-20 Google Inc. Embossed heat spreader
US8244971B2 (en) 2006-07-31 2012-08-14 Google Inc. Memory circuit system and method
US8327104B2 (en) 2006-07-31 2012-12-04 Google Inc. Adjusting the timing of signals associated with a memory system
US8077535B2 (en) 2006-07-31 2011-12-13 Google Inc. Memory refresh apparatus and method
US9542352B2 (en) 2006-02-09 2017-01-10 Google Inc. System and method for reducing command scheduling constraints of memory circuits
US8041881B2 (en) 2006-07-31 2011-10-18 Google Inc. Memory device with emulated characteristics
US8055833B2 (en) 2006-10-05 2011-11-08 Google Inc. System and method for increasing capacity, performance, and flexibility of flash storage
US10013371B2 (en) 2005-06-24 2018-07-03 Google Llc Configurable memory circuit system and method
US9507739B2 (en) 2005-06-24 2016-11-29 Google Inc. Configurable memory circuit system and method
US8386722B1 (en) 2008-06-23 2013-02-26 Google Inc. Stacked DIMM memory interface
US8130560B1 (en) 2006-11-13 2012-03-06 Google Inc. Multi-rank partial width memory modules
DE102005031643B4 (de) * 2005-07-06 2007-06-14 Infineon Technologies Ag DRAM-Speicher
GB2444663B (en) 2005-09-02 2011-12-07 Metaram Inc Methods and apparatus of stacking drams
US9048951B2 (en) * 2005-09-02 2015-06-02 Georgios Margaritis Free space optics photodetector and transceiver
CN100349108C (zh) * 2005-11-21 2007-11-14 北京中星微电子有限公司 与非门快闪存储器的物理接口、接口方法和管理设备
JP2007156567A (ja) * 2005-11-30 2007-06-21 Toshiba Corp 情報処理装置、およびメモリ制御方法
US7752488B2 (en) * 2006-01-06 2010-07-06 International Business Machines Corporation Method to adjust error thresholds in a data storage and retrieval system
US9632929B2 (en) 2006-02-09 2017-04-25 Google Inc. Translating an address associated with a command communicated between a system and memory circuits
ITTO20060719A1 (it) * 2006-10-06 2008-04-07 Micron Technology Inc Architettura di registri filtrati per generare segnali per attuatori
US7764798B1 (en) * 2006-07-21 2010-07-27 Cingular Wireless Ii, Llc Radio frequency interference reduction in connection with mobile phones
US7724589B2 (en) 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
US20080114960A1 (en) * 2006-11-14 2008-05-15 Tau-Li Huang Memory control methods for accessing a memory with partial or full serial transmission, and related apparatus
TWI311326B (en) * 2006-12-01 2009-06-21 Realtek Semiconductor Corp Memory controller and signal synchronizing method thereof
KR100936149B1 (ko) * 2006-12-29 2010-01-12 삼성전자주식회사 복수의 비휘발성 메모리를 갖는 메모리 시스템 그것의 메모리 억세스 방법
US8140803B2 (en) * 2007-01-09 2012-03-20 International Business Machines Corporation Structure for reducing latency associated with read operations in a memory system
US20080276133A1 (en) * 2007-05-02 2008-11-06 Andrew Hadley Software-Controlled Dynamic DDR Calibration
JP4922834B2 (ja) * 2007-05-29 2012-04-25 株式会社日立製作所 コンピュータシステムに存在するリソースの性能を監視する装置及び方法
WO2008149415A1 (ja) * 2007-06-04 2008-12-11 Fujitsu Limited パケットスイッチ装置
US8209479B2 (en) * 2007-07-18 2012-06-26 Google Inc. Memory circuit system and method
US8099564B1 (en) * 2007-08-10 2012-01-17 Xilinx, Inc. Programmable memory controller
US8080874B1 (en) 2007-09-14 2011-12-20 Google Inc. Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
JP5103663B2 (ja) * 2007-09-27 2012-12-19 ルネサスエレクトロニクス株式会社 メモリ制御装置
JP2009282721A (ja) * 2008-05-21 2009-12-03 Nec Electronics Corp メモリコントローラ、メモリコントロールシステム及びメモリ遅延量制御方法
US8295402B2 (en) * 2008-06-04 2012-10-23 Qualcomm Incorporated Optimal blind channel estimation for DQPSK demodulation
US20090327535A1 (en) * 2008-06-30 2009-12-31 Liu Tz-Yi Adjustable read latency for memory device in page-mode access
TWI414925B (zh) * 2008-11-27 2013-11-11 Asustek Comp Inc 決定記憶體模組控制訊號之品質參數的方法及其電子裝置
DE102009007215A1 (de) * 2009-02-03 2010-08-05 Siemens Aktiengesellschaft Automatisierungssystem mit einem programmierbaren Matrixmodul
TWI474260B (zh) * 2009-02-16 2015-02-21 Asustek Comp Inc 電腦系統與其主機板上之記憶體電路和開機方法
CN101859330B (zh) * 2009-04-09 2012-11-21 辉达公司 验证集成电路效能模型的方法
DE202010017690U1 (de) 2009-06-09 2012-05-29 Google, Inc. Programmierung von Dimm-Abschlusswiderstandswerten
TWI400607B (zh) * 2009-06-11 2013-07-01 Asustek Comp Inc 調整記憶體內部參數的方法及使用其之電腦系統
US8248869B1 (en) * 2009-10-16 2012-08-21 Xilinx, Inc. Configurable memory map interface and method of implementing a configurable memory map interface
US20120110400A1 (en) * 2010-11-01 2012-05-03 Altera Corporation Method and Apparatus for Performing Memory Interface Calibration
US8806245B2 (en) * 2010-11-04 2014-08-12 Apple Inc. Memory read timing margin adjustment for a plurality of memory arrays according to predefined delay tables
US8914564B2 (en) * 2010-12-29 2014-12-16 Silicon Laboratories Inc. Port control apparatus and associated methods
US8880831B2 (en) * 2011-05-12 2014-11-04 Advanced Micro Devices, Inc. Method and apparatus to reduce memory read latency
US20130151755A1 (en) 2011-12-12 2013-06-13 Reuven Elhamias Non-Volatile Storage Systems with Go To Sleep Adaption
US9519428B2 (en) 2012-09-26 2016-12-13 Qualcomm Incorporated Dynamically improving performance of a host memory controller and a memory device
US8581756B1 (en) 2012-09-27 2013-11-12 Cirrus Logic, Inc. Signal-characteristic determined digital-to-analog converter (DAC) filter stage configuration
US9411721B2 (en) 2013-11-15 2016-08-09 Sandisk Technologies Llc Detecting access sequences for data compression on non-volatile memory devices
US9287005B2 (en) * 2013-12-13 2016-03-15 International Business Machines Corporation Detecting missing write to cache/memory operations
KR20150070528A (ko) * 2013-12-17 2015-06-25 에스케이하이닉스 주식회사 데이터 저장 장치 및 그것의 동작 방법
US9594516B2 (en) * 2014-02-14 2017-03-14 Sony Semiconductor Solutions Corporation Memory device with variable trim parameters
US20160299894A1 (en) * 2015-04-07 2016-10-13 Victor Chernov Method of sparse array implementation for large arrays
US9601193B1 (en) 2015-09-14 2017-03-21 Intel Corporation Cross point memory control
US9818458B1 (en) * 2015-09-23 2017-11-14 Intel Corporation Techniques for entry to a lower power state for a memory device
CN106557267A (zh) * 2015-09-29 2017-04-05 鸿富锦精密工业（深圳）有限公司 硬盘工作环境修改系统及修改方法
US20180095699A1 (en) * 2016-10-01 2018-04-05 National Tsing Hua University Memory system, memory device thereof, and method for writing to and reading from memory device thereof
US11449431B2 (en) 2017-05-30 2022-09-20 Seagate Technology Llc Data storage device with rewritable in-place memory
US10090067B1 (en) 2017-05-30 2018-10-02 Seagate Technology Llc Data storage device with rewritable in-place memory
US10068663B1 (en) 2017-05-30 2018-09-04 Seagate Technology Llc Data storage device with rewriteable in-place memory
US10147501B1 (en) 2017-05-30 2018-12-04 Seagate Technology Llc Data storage device with rewriteable in-place memory
CN109600195B (zh) * 2017-09-30 2020-09-25 电信科学技术研究院 一种信息交织方法、信息解交织方法及相关装置
US10866900B2 (en) * 2017-10-17 2020-12-15 Samsung Electronics Co., Ltd. ISA extension for high-bandwidth memory
US11079945B2 (en) * 2018-09-20 2021-08-03 Ati Technologies Ulc Dynamic configuration of memory timing parameters
US10685722B1 (en) * 2019-01-24 2020-06-16 Western Digital Technologies, Inc. Method and system for improving performance of a storage device using asynchronous independent plane read functionality
US11314686B2 (en) * 2019-02-26 2022-04-26 Nxp Usa, Inc. Hardware for supporting time triggered load anticipation in the context of a real time OS
KR20230026877A (ko) * 2021-08-18 2023-02-27 에스케이하이닉스 주식회사 컴퓨팅 시스템 및 그 동작 방법

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4063308A (en) * 1975-06-27 1977-12-13 International Business Machines Corporation Automatic clock tuning and measuring system for LSI computers
JPH0212541A (ja) 1988-04-29 1990-01-17 Internatl Business Mach Corp <Ibm> コンピユーテイング・システム及びその動作方法
US5276858A (en) * 1991-12-26 1994-01-04 Intel Corporation Memory controller with integrated delay line circuitry
US5809340A (en) 1993-04-30 1998-09-15 Packard Bell Nec Adaptively generating timing signals for access to various memory devices based on stored profiles
US6338148B1 (en) * 1993-11-10 2002-01-08 Compaq Computer Corporation Real-time test controller
US5692165A (en) 1995-09-12 1997-11-25 Micron Electronics Inc. Memory controller with low skew control signal
US6088774A (en) * 1996-09-20 2000-07-11 Advanced Memory International, Inc. Read/write timing for maximum utilization of bidirectional read/write bus
US6173345B1 (en) * 1998-11-03 2001-01-09 Intel Corporation Method and apparatus for levelizing transfer delays for a channel of devices such as memory devices in a memory subsystem

Also Published As

Publication number Publication date
KR20010075082A (ko) 2001-08-09
WO2000020978A1 (en) 2000-04-13
US20020013881A1 (en) 2002-01-31
EP1116123B1 (de) 2003-05-07
EP1116123A1 (de) 2001-07-18
US6438670B1 (en) 2002-08-20
JP2002526861A (ja) 2002-08-20
KR100450726B1 (ko) 2004-10-01
US6334174B1 (en) 2001-12-25
US6453434B2 (en) 2002-09-17

Similar Documents

Publication Publication Date Title
DE69907704D1 (de) Speichersteuerungsvorrichtung mit programmierbarem verzögerungszähler zur leistungsabstimmung in abhängigkeit von zeitparametern des gesteuerten speichergeräts
DE69942955D1 (de) Vorrichtung zur Pulsbreitenmodulationssteuerung mit Standby-Modus
DE69920225D1 (de) Verstellbar lichtschwächende vorrichtung mit dichroitischem flüssigkristall
DE69818946D1 (de) Vorrichtung zur Steuerung der Drehphase
DE69921153D1 (de) Variable ventilsteuerungseinrichtung
ATA227794A (de) Beschlag zur höhenverstellung von schubladen
DE69232303D1 (de) PC mit integriertem wiederbeschreibbarem ROM zur Speicherung des BIOS
DE69634182D1 (de) Direktspeicherzugriffssteuerung mit programmierbarer Zeitsteuerung
ATE223208T1 (de) Membranen zur steuerung des durchflusses in vorrichtungen mit kontrollierter wirkstoffabgabe
DE69806666T2 (de) Abstandsbelichtungsvorrichtung mit Vorrichtung zur Einstellung des Abstandes
DE69739950D1 (de) Kaugummi enthaltend azyklische carboxamide mit kontrollierter freisetzung
DE69302059D1 (de) Ventilsteuerungsvorrichtung mit Mechanismus zur Veränderung der Ventilsteuerzeit
DE69409167T2 (de) Vorrichtung zum Frischhalten im Kühlschrank
DE69900080D1 (de) Wasser-in-Öl Zusammensetzung mit verlaufsveränderlicher Schergeschwindigkeit
NO974372L (no) Brönnstyringssystemer med nettverk nede i brönnen
DE59806709D1 (de) Geschoss mit programmierbarem Zeitzünder
DE69920350D1 (de) Selbstregelvorrichtung zum Steuern von Kühlschränken und Gefrierapparaten
DE69114344D1 (de) Schalter zur Kontrolle des Stromflusses in Supraleitern.
HK1017092A1 (en) Electronically controlled, mechanical timepiece and control method for the same
HK1044863A1 (zh) 振蕩器和振蕩器的控制方法
DE69919089D1 (de) Variable Ventilsteuervorrichtung
DE69711160D1 (de) Variable Ventilsteuerungseinrichtung
DE59204455D1 (de) Programmierbare Steuer- und Regeleinrichtung.
DK0835798T3 (da) Styringskontrolindretning
DE69508747T2 (de) Vorrichtung zum kalthalten von speisen

Legal Events

Date Code Title Description
8332 No legal effect for de