DE69736460D1 - Verfahren zur Herstellung von gerichtet abgeschiedenem Silizid über Transistorelektroden - Google Patents
Verfahren zur Herstellung von gerichtet abgeschiedenem Silizid über TransistorelektrodenInfo
- Publication number
- DE69736460D1 DE69736460D1 DE69736460T DE69736460T DE69736460D1 DE 69736460 D1 DE69736460 D1 DE 69736460D1 DE 69736460 T DE69736460 T DE 69736460T DE 69736460 T DE69736460 T DE 69736460T DE 69736460 D1 DE69736460 D1 DE 69736460D1
- Authority
- DE
- Germany
- Prior art keywords
- via transistor
- transistor electrodes
- directionally deposited
- deposited silicide
- producing directionally
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 229910021332 silicide Inorganic materials 0.000 title 1
- FVBUAEGBCNSCDD-UHFFFAOYSA-N silicide(4-) Chemical compound [Si-4] FVBUAEGBCNSCDD-UHFFFAOYSA-N 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
- H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/665—Unipolar field-effect transistors with an insulated gate, i.e. MISFET using self aligned silicidation, i.e. salicide
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/147—Silicides
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Electrodes Of Semiconductors (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US768647 | 1996-12-18 | ||
US08/768,647 US5814537A (en) | 1996-12-18 | 1996-12-18 | Method of forming transistor electrodes from directionally deposited silicide |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69736460D1 true DE69736460D1 (de) | 2006-09-21 |
DE69736460T2 DE69736460T2 (de) | 2007-03-01 |
Family
ID=25083094
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69736460T Expired - Lifetime DE69736460T2 (de) | 1996-12-18 | 1997-10-14 | Verfahren zur Herstellung von gerichtet abgeschiedenem Silizid über Transistorelektroden |
Country Status (7)
Country | Link |
---|---|
US (1) | US5814537A (de) |
EP (1) | EP0849783B1 (de) |
JP (1) | JP3609242B2 (de) |
KR (1) | KR100327513B1 (de) |
DE (1) | DE69736460T2 (de) |
MY (1) | MY118300A (de) |
TW (1) | TW389947B (de) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE69636818T2 (de) * | 1995-06-19 | 2007-11-08 | Interuniversitair Micro-Elektronica Centrum Vzw | Verfahren zur selbst-justierten Herstellung von implantierten Gebieten |
JPH1168103A (ja) * | 1997-08-22 | 1999-03-09 | Mitsubishi Electric Corp | 半導体装置の製造方法 |
US6316357B1 (en) * | 1997-10-08 | 2001-11-13 | Industrial Technology Research Institute | Method for forming metal silicide by laser irradiation |
US5891763A (en) * | 1997-10-22 | 1999-04-06 | Wanlass; Frank M. | Damascene pattering of SOI MOS transistors |
US5937319A (en) * | 1997-10-31 | 1999-08-10 | Advanced Micro Devices, Inc. | Method of making a metal oxide semiconductor (MOS) transistor polysilicon gate with a size beyond photolithography limitation by using polysilicidation and selective etching |
JP3568385B2 (ja) * | 1998-03-16 | 2004-09-22 | 沖電気工業株式会社 | 半導体装置の製造方法 |
US6156649A (en) * | 1998-04-14 | 2000-12-05 | Advanced Micro Devices, Inc. | Method of forming uniform sheet resistivity salicide |
US6255215B1 (en) * | 1998-10-20 | 2001-07-03 | Advanced Micro Services | Semiconductor device having silicide layers formed using a collimated metal layer |
JP2000196071A (ja) * | 1998-12-25 | 2000-07-14 | Mitsubishi Electric Corp | 半導体装置の製造方法及び半導体装置 |
KR100295061B1 (ko) * | 1999-03-29 | 2001-07-12 | 윤종용 | 챔퍼가 형성된 실리사이드층을 갖춘 반도체소자 및 그 제조방법 |
US6420220B1 (en) * | 1999-04-16 | 2002-07-16 | Advanced Micro Devices, Inc. | Method of forming electrode for high performance semiconductor devices |
KR100297738B1 (ko) * | 1999-10-07 | 2001-11-02 | 윤종용 | 챔퍼가 형성된 금속 실리사이드층을 갖춘 반도체소자의 제조방법 |
US6440851B1 (en) * | 1999-10-12 | 2002-08-27 | International Business Machines Corporation | Method and structure for controlling the interface roughness of cobalt disilicide |
JP3297415B2 (ja) * | 2000-02-09 | 2002-07-02 | 株式会社半導体先端テクノロジーズ | 半導体装置の製造方法 |
US6451693B1 (en) * | 2000-10-05 | 2002-09-17 | Advanced Micro Device, Inc. | Double silicide formation in polysicon gate without silicide in source/drain extensions |
US6495460B1 (en) * | 2001-07-11 | 2002-12-17 | Advanced Micro Devices, Inc. | Dual layer silicide formation using a titanium barrier to reduce surface roughness at silicide/junction interface |
DE10208728B4 (de) * | 2002-02-28 | 2009-05-07 | Advanced Micro Devices, Inc., Sunnyvale | Ein Verfahren zur Herstellung eines Halbleiterelements mit unterschiedlichen Metallsilizidbereichen |
KR100429886B1 (ko) * | 2002-05-15 | 2004-05-03 | 삼성전자주식회사 | 균일한 실리사이드 접합을 갖는 집적 회로 반도체 소자 및그 제조방법 |
US20060183268A1 (en) * | 2005-02-14 | 2006-08-17 | Omnivision Technologies, Inc. | Salicide process for image sensor |
US20060183323A1 (en) * | 2005-02-14 | 2006-08-17 | Omnivision Technologies, Inc. | Salicide process using CMP for image sensor |
KR100642648B1 (ko) * | 2005-09-13 | 2006-11-10 | 삼성전자주식회사 | 실리사이드막들을 갖는 콘택 구조체, 이를 채택하는반도체소자, 및 이를 제조하는 방법들 |
US7456095B2 (en) * | 2005-10-03 | 2008-11-25 | International Business Machines Corporation | Method and apparatus for forming nickel silicide with low defect density in FET devices |
FR2893762B1 (fr) * | 2005-11-18 | 2007-12-21 | Commissariat Energie Atomique | Procede de realisation de transistor a double grilles auto-alignees par reduction de motifs de grille |
US7459382B2 (en) * | 2006-03-24 | 2008-12-02 | International Business Machines Corporation | Field effect device with reduced thickness gate |
US10164050B2 (en) | 2014-12-24 | 2018-12-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and formation method of semiconductor device structure with gate stack |
Family Cites Families (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4716131A (en) * | 1983-11-28 | 1987-12-29 | Nec Corporation | Method of manufacturing semiconductor device having polycrystalline silicon layer with metal silicide film |
US5001082A (en) * | 1989-04-12 | 1991-03-19 | Mcnc | Self-aligned salicide process for forming semiconductor devices and devices formed thereby |
US5215931A (en) * | 1989-06-13 | 1993-06-01 | Texas Instruments Incorporated | Method of making extended body contact for semiconductor over insulator transistor |
US5102815A (en) * | 1990-12-19 | 1992-04-07 | Intel Corporation | Method of fabricating a composite inverse T-gate metal oxide semiconductor device |
JP3285934B2 (ja) * | 1991-07-16 | 2002-05-27 | 株式会社東芝 | 半導体装置の製造方法 |
US5242847A (en) * | 1992-07-27 | 1993-09-07 | North Carolina State University At Raleigh | Selective deposition of doped silion-germanium alloy on semiconductor substrate |
JP2677168B2 (ja) * | 1993-09-17 | 1997-11-17 | 日本電気株式会社 | 半導体装置の製造方法 |
JP2699839B2 (ja) * | 1993-12-03 | 1998-01-19 | 日本電気株式会社 | 半導体装置の製造方法 |
US5449642A (en) * | 1994-04-14 | 1995-09-12 | Duke University | Method of forming metal-disilicide layers and contacts |
-
1996
- 1996-12-18 US US08/768,647 patent/US5814537A/en not_active Expired - Lifetime
-
1997
- 1997-09-17 JP JP25179897A patent/JP3609242B2/ja not_active Expired - Fee Related
- 1997-10-06 TW TW086114591A patent/TW389947B/zh not_active IP Right Cessation
- 1997-10-09 MY MYPI97004735A patent/MY118300A/en unknown
- 1997-10-14 DE DE69736460T patent/DE69736460T2/de not_active Expired - Lifetime
- 1997-10-14 EP EP97308115A patent/EP0849783B1/de not_active Expired - Lifetime
- 1997-10-17 KR KR1019970053983A patent/KR100327513B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
JP3609242B2 (ja) | 2005-01-12 |
TW389947B (en) | 2000-05-11 |
JPH10178179A (ja) | 1998-06-30 |
US5814537A (en) | 1998-09-29 |
EP0849783A3 (de) | 1999-01-13 |
DE69736460T2 (de) | 2007-03-01 |
KR19980063533A (ko) | 1998-10-07 |
EP0849783A2 (de) | 1998-06-24 |
EP0849783B1 (de) | 2006-08-09 |
KR100327513B1 (ko) | 2002-08-14 |
MY118300A (en) | 2004-09-30 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |