DE69735750D1 - Verfahren zur Herstellung von Leiterplatten - Google Patents

Verfahren zur Herstellung von Leiterplatten

Info

Publication number
DE69735750D1
DE69735750D1 DE69735750T DE69735750T DE69735750D1 DE 69735750 D1 DE69735750 D1 DE 69735750D1 DE 69735750 T DE69735750 T DE 69735750T DE 69735750 T DE69735750 T DE 69735750T DE 69735750 D1 DE69735750 D1 DE 69735750D1
Authority
DE
Germany
Prior art keywords
production
printed circuit
circuit boards
boards
printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69735750T
Other languages
English (en)
Other versions
DE69735750T2 (de
Inventor
Nieto Rodolfo Kroebel
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Lear Automotive EEDS Spain SL
Original Assignee
Lear Automotive EEDS Spain SL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Lear Automotive EEDS Spain SL filed Critical Lear Automotive EEDS Spain SL
Application granted granted Critical
Publication of DE69735750D1 publication Critical patent/DE69735750D1/de
Publication of DE69735750T2 publication Critical patent/DE69735750T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/202—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using self-supporting metal foil pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09009—Substrate related
    • H05K2201/09118—Moulded substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03—Metal processing
    • H05K2203/0369—Etching selective parts of a metal substrate through part of its thickness, e.g. using etch resist
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/14—Related to the order of processing steps
    • H05K2203/1476—Same or similar kind of process performed in phases, e.g. coarse patterning followed by fine patterning

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Structure Of Printed Boards (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)
  • Laminated Bodies (AREA)
DE1997635750 1997-01-31 1997-10-09 Verfahren zur Herstellung von Leiterplatten Expired - Fee Related DE69735750T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
ES9700184A ES2125821B1 (es) 1997-01-31 1997-01-31 Un procedimiento de fabricacion de circuitos impresos.
ES9700184 1997-01-31

Publications (2)

Publication Number Publication Date
DE69735750D1 true DE69735750D1 (de) 2006-06-01
DE69735750T2 DE69735750T2 (de) 2007-05-10

Family

ID=8298051

Family Applications (1)

Application Number Title Priority Date Filing Date
DE1997635750 Expired - Fee Related DE69735750T2 (de) 1997-01-31 1997-10-09 Verfahren zur Herstellung von Leiterplatten

Country Status (6)

Country Link
EP (1) EP0857010B1 (de)
JP (1) JPH10224011A (de)
CA (1) CA2279340A1 (de)
DE (1) DE69735750T2 (de)
ES (2) ES2125821B1 (de)
WO (1) WO1998034444A1 (de)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002503878A (ja) * 1997-12-05 2002-02-05 リア オートモーティヴ ディアボーン インコーポレイテッド プリント回路及び製造方法
EP1257157B1 (de) 1999-12-31 2004-11-24 Lear Automotive (EEDS) Spain, S.L. Leiterplattenherstellungsmethode
ES2188381B1 (es) * 2001-06-05 2004-12-16 Lear Automotive (Eeds) Spain, S.L. Procedimiento de fabricacion de placas de circuito impreso a partir de un polimero extrusionado.
CN105282974B (zh) * 2015-10-14 2018-05-11 深圳崇达多层线路板有限公司 一种阶梯式印制电路板的制作方法
CN109195340A (zh) * 2018-09-18 2019-01-11 桑尼维尔新材料科技(南京)有限公司 一种制作金属化陶瓷基板超窄线宽、线距图形的方法
CN110098302A (zh) * 2019-05-06 2019-08-06 华南理工大学 一种用于微型led器件的柔性聚酰亚胺衬底及其制备方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3085295A (en) * 1957-04-30 1963-04-16 Michael A Pizzino Method of making inlaid circuits
FR1260804A (fr) * 1960-03-31 1961-05-12 Electronique & Automatisme Sa Procédé de réalisation de circuits imprimés
GB971775A (en) * 1961-07-17 1964-10-07 Borg Warner Electrical terminal board
US3177103A (en) * 1961-09-18 1965-04-06 Sauders Associates Inc Two pass etching for fabricating printed circuitry
US3264152A (en) * 1963-03-26 1966-08-02 Tri Tech Method for fabricating electrical circuit components
DE1665944A1 (de) * 1967-05-13 1971-04-08 Siemens Ag Verfahren zum Herstellen elektrischer Schaltkreise
JPH02138793A (ja) * 1988-11-18 1990-05-28 Shinko Electric Ind Co Ltd 回路基板の製造方法
ES2071540B1 (es) * 1992-01-29 1996-02-01 Mecanismos Aux Ind Perfeccionamientos en los procesos de fabricacion de cajas de servicios y de sus partes.

Also Published As

Publication number Publication date
ES2143932B1 (es) 2000-12-01
ES2143932A1 (es) 2000-05-16
EP0857010B1 (de) 2006-04-26
EP0857010A1 (de) 1998-08-05
DE69735750T2 (de) 2007-05-10
WO1998034444A1 (en) 1998-08-06
CA2279340A1 (en) 1998-08-06
ES2125821A1 (es) 1999-03-01
ES2125821B1 (es) 1999-12-01
JPH10224011A (ja) 1998-08-21

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee