DE69735032T2 - Halbleiteranordnung und Verfahren zum Zusammensetzen derselben - Google Patents

Halbleiteranordnung und Verfahren zum Zusammensetzen derselben Download PDF

Info

Publication number
DE69735032T2
DE69735032T2 DE69735032T DE69735032T DE69735032T2 DE 69735032 T2 DE69735032 T2 DE 69735032T2 DE 69735032 T DE69735032 T DE 69735032T DE 69735032 T DE69735032 T DE 69735032T DE 69735032 T2 DE69735032 T2 DE 69735032T2
Authority
DE
Germany
Prior art keywords
adhesive
semiconductor chip
semiconductor device
connection
connection element
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69735032T
Other languages
German (de)
English (en)
Other versions
DE69735032D1 (de
Inventor
Shinji 7-12 Toranomon 1-chome Ohuchi
Etsuo 7-12 Toranomon 1-chome Yamada
Yasushi 7-12 Toranomon 1-chome Shiraishi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Application granted granted Critical
Publication of DE69735032D1 publication Critical patent/DE69735032D1/de
Publication of DE69735032T2 publication Critical patent/DE69735032T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H10W74/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/40—Leadframes
    • H10W70/411—Chip-supporting parts, e.g. die pads
    • H10W70/415—Leadframe inner leads serving as die pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/011—Apparatus therefor
    • H10W72/0113—Apparatus for manufacturing die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07352—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in structures or sizes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/536—Shapes of wire connectors the connected ends being ball-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/531—Shapes of wire connectors
    • H10W72/5363—Shapes of wire connectors the connected ends being wedge-shaped
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/853—On the same surface
    • H10W72/865—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00—Encapsulations, e.g. protective coatings
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/736—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/756—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked lead frame, conducting package substrate or heat sink

Landscapes

  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
DE69735032T 1996-04-10 1997-04-07 Halbleiteranordnung und Verfahren zum Zusammensetzen derselben Expired - Fee Related DE69735032T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP8696896 1996-04-10
JP8086968A JPH09283545A (ja) 1996-04-10 1996-04-10 樹脂封止型半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE69735032D1 DE69735032D1 (de) 2006-03-30
DE69735032T2 true DE69735032T2 (de) 2006-08-31

Family

ID=13901682

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69735032T Expired - Fee Related DE69735032T2 (de) 1996-04-10 1997-04-07 Halbleiteranordnung und Verfahren zum Zusammensetzen derselben

Country Status (7)

Country Link
US (1) US6097083A (enFirst)
EP (1) EP0801424B1 (enFirst)
JP (1) JPH09283545A (enFirst)
KR (1) KR100366110B1 (enFirst)
CN (1) CN1091950C (enFirst)
DE (1) DE69735032T2 (enFirst)
TW (1) TW494507B (enFirst)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5969410A (en) * 1996-05-09 1999-10-19 Oki Electric Industry Co., Ltd. Semiconductor IC device having chip support element and electrodes on the same surface
JP2001320007A (ja) * 2000-05-09 2001-11-16 Dainippon Printing Co Ltd 樹脂封止型半導体装置用フレーム
JP2005277415A (ja) * 2004-03-23 2005-10-06 Samsung Electronics Co Ltd リードチップ直接付着型半導体パッケージ、その製造方法及び装置

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06105721B2 (ja) * 1985-03-25 1994-12-21 日立超エル・エス・アイエンジニアリング株式会社 半導体装置
US4974057A (en) * 1986-10-31 1990-11-27 Texas Instruments Incorporated Semiconductor device package with circuit board and resin
JPS6437132U (enFirst) * 1987-08-31 1989-03-06
JPH02125454A (ja) * 1988-11-02 1990-05-14 Nec Corp 樹脂封止型半導体装置
US5403785A (en) * 1991-03-03 1995-04-04 Matsushita Electric Works, Ltd. Process of fabrication IC chip package from an IC chip carrier substrate and a leadframe and the IC chip package fabricated thereby
DE69322334T2 (de) * 1992-09-09 1999-06-02 Texas Instruments Inc., Dallas, Tex. Leiterrahmen mit reduzierter Kapazitanz für Leiter-auf-Chip-Packung
JP3137518B2 (ja) * 1993-10-29 2001-02-26 株式会社巴川製紙所 電子部品用液状接着剤およびそれを用いる絶縁接着層の形成方法
TW270213B (enFirst) * 1993-12-08 1996-02-11 Matsushita Electric Industrial Co Ltd
US5545921A (en) * 1994-11-04 1996-08-13 International Business Machines, Corporation Personalized area leadframe coining or half etching for reduced mechanical stress at device edge
JP3127195B2 (ja) * 1994-12-06 2001-01-22 シャープ株式会社 発光デバイスおよびその製造方法
TW314650B (enFirst) * 1995-06-21 1997-09-01 Oki Electric Ind Co Ltd

Also Published As

Publication number Publication date
EP0801424B1 (en) 2006-01-04
TW494507B (en) 2002-07-11
CN1091950C (zh) 2002-10-02
EP0801424A2 (en) 1997-10-15
DE69735032D1 (de) 2006-03-30
CN1165400A (zh) 1997-11-19
KR970072220A (ko) 1997-11-07
KR100366110B1 (ko) 2003-02-19
EP0801424A3 (enFirst) 1997-10-22
US6097083A (en) 2000-08-01
JPH09283545A (ja) 1997-10-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee