DE69623509D1 - Integriertes Halbleiterbauelement mit Schutzvorrichtung gegen elektrostatische Entladungen - Google Patents

Integriertes Halbleiterbauelement mit Schutzvorrichtung gegen elektrostatische Entladungen

Info

Publication number
DE69623509D1
DE69623509D1 DE69623509T DE69623509T DE69623509D1 DE 69623509 D1 DE69623509 D1 DE 69623509D1 DE 69623509 T DE69623509 T DE 69623509T DE 69623509 T DE69623509 T DE 69623509T DE 69623509 D1 DE69623509 D1 DE 69623509D1
Authority
DE
Germany
Prior art keywords
protective device
electrostatic discharge
semiconductor component
integrated semiconductor
device against
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69623509T
Other languages
English (en)
Other versions
DE69623509T2 (de
Inventor
Kaoru Narita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Micron Memory Japan Ltd
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Publication of DE69623509D1 publication Critical patent/DE69623509D1/de
Application granted granted Critical
Publication of DE69623509T2 publication Critical patent/DE69623509T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/0203—Particular design considerations for integrated circuits
    • H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0288—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using passive elements as protective elements, e.g. resistors, capacitors, inductors, spark-gaps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE69623509T 1995-01-11 1996-01-11 Integriertes Halbleiterbauelement mit Schutzvorrichtung gegen elektrostatische Entladungen Expired - Lifetime DE69623509T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7002319A JP2638537B2 (ja) 1995-01-11 1995-01-11 半導体装置

Publications (2)

Publication Number Publication Date
DE69623509D1 true DE69623509D1 (de) 2002-10-17
DE69623509T2 DE69623509T2 (de) 2003-05-28

Family

ID=11526013

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69623509T Expired - Lifetime DE69623509T2 (de) 1995-01-11 1996-01-11 Integriertes Halbleiterbauelement mit Schutzvorrichtung gegen elektrostatische Entladungen

Country Status (7)

Country Link
US (1) US5844281A (de)
EP (1) EP0722187B1 (de)
JP (1) JP2638537B2 (de)
KR (1) KR100196597B1 (de)
CN (1) CN1055566C (de)
DE (1) DE69623509T2 (de)
TW (1) TW376577B (de)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2780661B2 (ja) * 1995-03-04 1998-07-30 日本電気株式会社 半導体装置
KR100449180B1 (ko) * 1997-12-31 2005-01-05 주식회사 하이닉스반도체 반도체소자의정전기방지회로용트랜지스터구조
GB9925227D0 (en) 1999-10-25 1999-12-22 Internet Limited Data storage retrieval and access system
US6587320B1 (en) 2000-01-04 2003-07-01 Sarnoff Corporation Apparatus for current ballasting ESD sensitive devices
US6700164B1 (en) 2000-07-07 2004-03-02 International Business Machines Corporation Tungsten hot wire current limiter for ESD protection
JP2003007844A (ja) * 2001-04-09 2003-01-10 Seiko Instruments Inc 半導体装置
JP4170210B2 (ja) * 2003-12-19 2008-10-22 Ｎｅｃエレクトロニクス株式会社 半導体装置
US7112855B2 (en) * 2004-05-07 2006-09-26 Broadcom Corporation Low ohmic layout technique for MOS transistors
JP2006245390A (ja) * 2005-03-04 2006-09-14 Toshiba Corp 半導体集積回路装置およびその製造方法
JP5147234B2 (ja) 2006-12-28 2013-02-20 パナソニック株式会社 半導体集積回路装置
KR100829144B1 (ko) 2007-06-15 2008-05-13 황보석건 스노우보드 바인딩의 각도조절용 디스크
CN107968088A (zh) * 2017-10-17 2018-04-27 北方电子研究院安徽有限公司 一种双向抗静电保护电路版图结构及其制备方法
DE102020109476A1 (de) 2020-02-02 2021-08-05 Taiwan Semiconductor Manufacturing Co., Ltd. Integrierte schaltung
CN113053870A (zh) 2020-02-02 2021-06-29 台湾积体电路制造股份有限公司 集成电路
CN114203039A (zh) * 2021-12-02 2022-03-18 昆山国显光电有限公司 显示面板及显示装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH061833B2 (ja) * 1982-11-11 1994-01-05 株式会社東芝 Ｍｏｓ形半導体装置
DE3586268T2 (de) * 1984-05-03 1993-02-25 Digital Equipment Corp Eingangs-schutzanordnung fuer vlsi-schaltungsanordnungen.
ES2055795T3 (es) * 1988-11-22 1994-09-01 At & T Corp Separador de salida de circuito integrado que tiene proteccion de esd mejorada.
JPH0373569A (ja) * 1989-08-14 1991-03-28 Nec Corp 半導体集積回路
JPH0462838A (ja) * 1990-06-25 1992-02-27 Matsushita Electron Corp 半導体装置

Also Published As

Publication number Publication date
US5844281A (en) 1998-12-01
CN1134608A (zh) 1996-10-30
JP2638537B2 (ja) 1997-08-06
EP0722187A2 (de) 1996-07-17
EP0722187A3 (de) 1996-11-06
KR960030394A (ko) 1996-08-17
TW376577B (en) 1999-12-11
JPH08191132A (ja) 1996-07-23
DE69623509T2 (de) 2003-05-28
EP0722187B1 (de) 2002-09-11
CN1055566C (zh) 2000-08-16
KR100196597B1 (ko) 1999-06-15

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: ELPIDA MEMORY, INC., TOKYO, JP