DE69616807T2 - Verfahren zum programmieren eines elektrisch programmierbaren speichers und leseverfahren - Google Patents
Verfahren zum programmieren eines elektrisch programmierbaren speichers und leseverfahrenInfo
- Publication number
- DE69616807T2 DE69616807T2 DE69616807T DE69616807T DE69616807T2 DE 69616807 T2 DE69616807 T2 DE 69616807T2 DE 69616807 T DE69616807 T DE 69616807T DE 69616807 T DE69616807 T DE 69616807T DE 69616807 T2 DE69616807 T2 DE 69616807T2
- Authority
- DE
- Germany
- Prior art keywords
- programming
- programmable memory
- electrically programmable
- reading
- reading method
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5642—Sensing or reading circuits; Data output circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
- G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
- G11C11/5628—Programming or writing circuits; Data input circuits
- G11C11/5635—Erasing circuits
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Read Only Memory (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| GB9517759A GB2304947B (en) | 1995-08-31 | 1995-08-31 | Electrically programmable memory, method of programming and method of reading |
| PCT/EP1996/003813 WO1997008706A1 (en) | 1995-08-31 | 1996-08-30 | Electrically programmable memory, method of programming and method of reading |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE69616807D1 DE69616807D1 (de) | 2001-12-13 |
| DE69616807T2 true DE69616807T2 (de) | 2002-04-11 |
Family
ID=10779984
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE69616807T Expired - Fee Related DE69616807T2 (de) | 1995-08-31 | 1996-08-30 | Verfahren zum programmieren eines elektrisch programmierbaren speichers und leseverfahren |
Country Status (7)
| Country | Link |
|---|---|
| US (1) | US5949709A (de) |
| EP (1) | EP0847583B1 (de) |
| JP (1) | JP3853844B2 (de) |
| CN (1) | CN1134019C (de) |
| DE (1) | DE69616807T2 (de) |
| GB (1) | GB2304947B (de) |
| WO (1) | WO1997008706A1 (de) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6081453A (en) * | 1997-04-15 | 2000-06-27 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
| GB2325546B (en) * | 1997-05-21 | 2001-10-17 | Motorola Inc | Electrically programmable memory and method of programming |
| FR2770326B1 (fr) * | 1997-10-28 | 2001-12-28 | Sgs Thomson Microelectronics | Procede d'ecriture dans une memoire non volatile modifiable electriquement |
| US6292395B1 (en) * | 1999-12-30 | 2001-09-18 | Macronix International Co., Ltd. | Source and drain sensing |
| JP2002133876A (ja) * | 2000-10-23 | 2002-05-10 | Hitachi Ltd | 半導体記憶装置 |
| US6862223B1 (en) * | 2002-07-05 | 2005-03-01 | Aplus Flash Technology, Inc. | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout |
| US7064978B2 (en) * | 2002-07-05 | 2006-06-20 | Aplus Flash Technology, Inc. | Monolithic, combo nonvolatile memory allowing byte, page and block write with no disturb and divided-well in the cell array using a unified cell structure and technology with a new scheme of decoder and layout |
| CN101465162B (zh) * | 2007-12-20 | 2013-06-12 | 世界先进积体电路股份有限公司 | 存储器的自动循序烧录判别装置与方法 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0772996B2 (ja) * | 1987-01-31 | 1995-08-02 | 株式会社東芝 | 不揮発性半導体メモリ |
| JP3099887B2 (ja) * | 1990-04-12 | 2000-10-16 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| US5218571A (en) * | 1990-05-07 | 1993-06-08 | Cypress Semiconductor Corporation | EPROM source bias circuit with compensation for processing characteristics |
| EP0463331A3 (en) * | 1990-06-28 | 1992-12-23 | Texas Instruments Incorporated | An improved method for programming a non-volatile memory |
| US5187683A (en) * | 1990-08-31 | 1993-02-16 | Texas Instruments Incorporated | Method for programming EEPROM memory arrays |
| US5418743A (en) * | 1992-12-07 | 1995-05-23 | Nippon Steel Corporation | Method of writing into non-volatile semiconductor memory |
| EP0649147A1 (de) * | 1993-10-11 | 1995-04-19 | Texas Instruments France | Speicheranordnung mit erhöhter-Kapazität |
| US5629890A (en) * | 1994-09-14 | 1997-05-13 | Information Storage Devices, Inc. | Integrated circuit system for analog signal storing and recovery incorporating read while writing voltage program method |
-
1995
- 1995-08-31 GB GB9517759A patent/GB2304947B/en not_active Revoked
-
1996
- 1996-08-30 EP EP96930136A patent/EP0847583B1/de not_active Expired - Lifetime
- 1996-08-30 US US09/029,598 patent/US5949709A/en not_active Expired - Fee Related
- 1996-08-30 WO PCT/EP1996/003813 patent/WO1997008706A1/en active IP Right Grant
- 1996-08-30 CN CNB961965851A patent/CN1134019C/zh not_active Expired - Fee Related
- 1996-08-30 JP JP50986097A patent/JP3853844B2/ja not_active Expired - Fee Related
- 1996-08-30 DE DE69616807T patent/DE69616807T2/de not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP3853844B2 (ja) | 2006-12-06 |
| GB9517759D0 (en) | 1995-11-01 |
| EP0847583A1 (de) | 1998-06-17 |
| EP0847583B1 (de) | 2001-11-07 |
| CN1134019C (zh) | 2004-01-07 |
| DE69616807D1 (de) | 2001-12-13 |
| GB2304947A (en) | 1997-03-26 |
| WO1997008706A1 (en) | 1997-03-06 |
| JPH11512208A (ja) | 1999-10-19 |
| US5949709A (en) | 1999-09-07 |
| GB2304947B (en) | 2000-02-23 |
| CN1194716A (zh) | 1998-09-30 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| 8328 | Change in the person/name/address of the agent |
Free format text: SCHUMACHER & WILLSAU, PATENTANWALTSSOZIETAET, 80335 MUENCHEN |
|
| 8364 | No opposition during term of opposition | ||
| 8327 | Change in the person/name/address of the patent owner |
Owner name: FREESCALE SEMICONDUCTOR, INC., AUSTIN, TEX., US |
|
| 8339 | Ceased/non-payment of the annual fee |