DE69533385D1 - Herstellungsverfahren von Verbindungen über Halbleitervorrichtungen - Google Patents
Herstellungsverfahren von Verbindungen über HalbleitervorrichtungenInfo
- Publication number
- DE69533385D1 DE69533385D1 DE69533385T DE69533385T DE69533385D1 DE 69533385 D1 DE69533385 D1 DE 69533385D1 DE 69533385 T DE69533385 T DE 69533385T DE 69533385 T DE69533385 T DE 69533385T DE 69533385 D1 DE69533385 D1 DE 69533385D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor devices
- connections via
- via semiconductor
- manufacturing connections
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76834—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers formation of thin insulating films on the sidewalls or on top of conductors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76837—Filling up the space between adjacent conductive structures; Gap-filling properties of dielectrics
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US25519894A | 1994-06-07 | 1994-06-07 | |
US255198 | 1994-06-07 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69533385D1 true DE69533385D1 (de) | 2004-09-23 |
DE69533385T2 DE69533385T2 (de) | 2005-08-25 |
Family
ID=22967269
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69533385T Expired - Fee Related DE69533385T2 (de) | 1994-06-07 | 1995-06-07 | Herstellungsverfahren von Verbindungen über Halbleitervorrichtungen |
Country Status (6)
Country | Link |
---|---|
US (2) | US5789319A (de) |
EP (1) | EP0687005B1 (de) |
JP (1) | JPH0855913A (de) |
KR (1) | KR100373804B1 (de) |
DE (1) | DE69533385T2 (de) |
TW (1) | TW295712B (de) |
Families Citing this family (37)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3607424B2 (ja) * | 1996-07-12 | 2005-01-05 | 株式会社東芝 | 半導体装置及びその製造方法 |
JP3159093B2 (ja) * | 1996-12-25 | 2001-04-23 | 日本電気株式会社 | 半導体装置およびその製造方法 |
JP2910713B2 (ja) | 1996-12-25 | 1999-06-23 | 日本電気株式会社 | 半導体装置の製造方法 |
US6303488B1 (en) | 1997-02-12 | 2001-10-16 | Micron Technology, Inc. | Semiconductor processing methods of forming openings to devices and substrates, exposing material from which photoresist cannot be substantially selectively removed |
US5976979A (en) * | 1997-06-10 | 1999-11-02 | Industrial Technology Research Institute | Sequential oxygen plasma treatment and chemical mechanical polish (CMP) planarizing method for forming planarized low dielectric constant dielectric layer |
US6660656B2 (en) | 1998-02-11 | 2003-12-09 | Applied Materials Inc. | Plasma processes for depositing low dielectric constant films |
US6054379A (en) * | 1998-02-11 | 2000-04-25 | Applied Materials, Inc. | Method of depositing a low k dielectric with organo silane |
US6340435B1 (en) | 1998-02-11 | 2002-01-22 | Applied Materials, Inc. | Integrated low K dielectrics and etch stops |
US6303523B2 (en) | 1998-02-11 | 2001-10-16 | Applied Materials, Inc. | Plasma processes for depositing low dielectric constant films |
US6593247B1 (en) | 1998-02-11 | 2003-07-15 | Applied Materials, Inc. | Method of depositing low k films using an oxidizing plasma |
US6627532B1 (en) * | 1998-02-11 | 2003-09-30 | Applied Materials, Inc. | Method of decreasing the K value in SiOC layer deposited by chemical vapor deposition |
US6413583B1 (en) | 1998-02-11 | 2002-07-02 | Applied Materials, Inc. | Formation of a liquid-like silica layer by reaction of an organosilicon compound and a hydroxyl forming compound |
US6287990B1 (en) | 1998-02-11 | 2001-09-11 | Applied Materials, Inc. | CVD plasma assisted low dielectric constant films |
US6159871A (en) | 1998-05-29 | 2000-12-12 | Dow Corning Corporation | Method for producing hydrogenated silicon oxycarbide films having low dielectric constant |
US6667553B2 (en) | 1998-05-29 | 2003-12-23 | Dow Corning Corporation | H:SiOC coated substrates |
US6800571B2 (en) * | 1998-09-29 | 2004-10-05 | Applied Materials Inc. | CVD plasma assisted low dielectric constant films |
US6495468B2 (en) | 1998-12-22 | 2002-12-17 | Micron Technology, Inc. | Laser ablative removal of photoresist |
US6399489B1 (en) | 1999-11-01 | 2002-06-04 | Applied Materials, Inc. | Barrier layer deposition using HDP-CVD |
US6531398B1 (en) | 2000-10-30 | 2003-03-11 | Applied Materials, Inc. | Method of depositing organosillicate layers |
US6753258B1 (en) | 2000-11-03 | 2004-06-22 | Applied Materials Inc. | Integration scheme for dual damascene structure |
US6709721B2 (en) | 2001-03-28 | 2004-03-23 | Applied Materials Inc. | Purge heater design and process development for the improvement of low k film properties |
US6486082B1 (en) * | 2001-06-18 | 2002-11-26 | Applied Materials, Inc. | CVD plasma assisted lower dielectric constant sicoh film |
JP3575448B2 (ja) * | 2001-08-23 | 2004-10-13 | セイコーエプソン株式会社 | 半導体装置 |
US6926926B2 (en) * | 2001-09-10 | 2005-08-09 | Applied Materials, Inc. | Silicon carbide deposited by high density plasma chemical-vapor deposition with bias |
US6936309B2 (en) | 2002-04-02 | 2005-08-30 | Applied Materials, Inc. | Hardness improvement of silicon carboxy films |
US20030194496A1 (en) * | 2002-04-11 | 2003-10-16 | Applied Materials, Inc. | Methods for depositing dielectric material |
US20030211244A1 (en) * | 2002-04-11 | 2003-11-13 | Applied Materials, Inc. | Reacting an organosilicon compound with an oxidizing gas to form an ultra low k dielectric |
US20030194495A1 (en) * | 2002-04-11 | 2003-10-16 | Applied Materials, Inc. | Crosslink cyclo-siloxane compound with linear bridging group to form ultra low k dielectric |
US6815373B2 (en) * | 2002-04-16 | 2004-11-09 | Applied Materials Inc. | Use of cyclic siloxanes for hardness improvement of low k dielectric films |
US20030206337A1 (en) * | 2002-05-06 | 2003-11-06 | Eastman Kodak Company | Exposure apparatus for irradiating a sensitized substrate |
US6927178B2 (en) * | 2002-07-11 | 2005-08-09 | Applied Materials, Inc. | Nitrogen-free dielectric anti-reflective coating and hardmask |
US7105460B2 (en) * | 2002-07-11 | 2006-09-12 | Applied Materials | Nitrogen-free dielectric anti-reflective coating and hardmask |
US6897163B2 (en) * | 2003-01-31 | 2005-05-24 | Applied Materials, Inc. | Method for depositing a low dielectric constant film |
US7288205B2 (en) | 2004-07-09 | 2007-10-30 | Applied Materials, Inc. | Hermetic low dielectric constant layer for barrier applications |
JP5326202B2 (ja) * | 2006-11-24 | 2013-10-30 | 富士通株式会社 | 半導体装置及びその製造方法 |
US10073604B2 (en) * | 2014-05-15 | 2018-09-11 | Oracle International Corporation | UI-driven model extensibility in multi-tier applications |
US10103056B2 (en) * | 2017-03-08 | 2018-10-16 | Lam Research Corporation | Methods for wet metal seed deposition for bottom up gapfill of features |
Family Cites Families (19)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4442137A (en) * | 1982-03-18 | 1984-04-10 | International Business Machines Corporation | Maskless coating of metallurgical features of a dielectric substrate |
US4584079A (en) * | 1983-10-11 | 1986-04-22 | Honeywell Inc. | Step shape tailoring by phase angle variation RF bias sputtering |
JPS63179548A (ja) * | 1987-01-21 | 1988-07-23 | Mitsubishi Electric Corp | 半導体集積回路装置の配線構造 |
JPH01235254A (ja) * | 1988-03-15 | 1989-09-20 | Nec Corp | 半導体装置及びその製造方法 |
US4986878A (en) * | 1988-07-19 | 1991-01-22 | Cypress Semiconductor Corp. | Process for improved planarization of the passivation layers for semiconductor devices |
JPH0289346A (ja) * | 1988-09-27 | 1990-03-29 | Toshiba Corp | 半導体装置及びその製造方法 |
JPH0793354B2 (ja) * | 1988-11-28 | 1995-10-09 | 株式会社東芝 | 半導体装置の製造方法 |
US5119164A (en) * | 1989-07-25 | 1992-06-02 | Advanced Micro Devices, Inc. | Avoiding spin-on-glass cracking in high aspect ratio cavities |
US5013691A (en) * | 1989-07-31 | 1991-05-07 | At&T Bell Laboratories | Anisotropic deposition of silicon dioxide |
US5166101A (en) * | 1989-09-28 | 1992-11-24 | Applied Materials, Inc. | Method for forming a boron phosphorus silicate glass composite layer on a semiconductor wafer |
US5077234A (en) * | 1990-06-29 | 1991-12-31 | Digital Equipment Corporation | Planarization process utilizing three resist layers |
JP2500235B2 (ja) * | 1991-02-07 | 1996-05-29 | 富士通株式会社 | 薄膜回路基板及びその製造方法 |
KR950002948B1 (ko) * | 1991-10-10 | 1995-03-28 | 삼성전자 주식회사 | 반도체 장치의 금속층간 절연막 형성방법 |
US5272117A (en) * | 1992-12-07 | 1993-12-21 | Motorola, Inc. | Method for planarizing a layer of material |
US5278103A (en) * | 1993-02-26 | 1994-01-11 | Lsi Logic Corporation | Method for the controlled formation of voids in doped glass dielectric films |
US5356513A (en) * | 1993-04-22 | 1994-10-18 | International Business Machines Corporation | Polishstop planarization method and structure |
US5324683A (en) * | 1993-06-02 | 1994-06-28 | Motorola, Inc. | Method of forming a semiconductor structure having an air region |
KR950034755A (de) * | 1994-05-27 | 1995-12-28 | ||
US6165335A (en) * | 1996-04-25 | 2000-12-26 | Pence And Mcgill University | Biosensor device and method |
-
1995
- 1995-06-06 JP JP7139505A patent/JPH0855913A/ja active Pending
- 1995-06-07 EP EP95304002A patent/EP0687005B1/de not_active Expired - Lifetime
- 1995-06-07 DE DE69533385T patent/DE69533385T2/de not_active Expired - Fee Related
- 1995-06-07 KR KR1019950014891A patent/KR100373804B1/ko not_active IP Right Cessation
- 1995-09-06 TW TW084109294A patent/TW295712B/zh not_active IP Right Cessation
-
1996
- 1996-02-26 US US08/606,695 patent/US5789319A/en not_active Expired - Lifetime
-
1997
- 1997-02-28 US US08/803,847 patent/US5786624A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0687005A3 (de) | 1997-04-16 |
KR960002599A (ko) | 1996-01-26 |
US5789319A (en) | 1998-08-04 |
TW295712B (de) | 1997-01-11 |
EP0687005A2 (de) | 1995-12-13 |
EP0687005B1 (de) | 2004-08-18 |
KR100373804B1 (ko) | 2003-03-28 |
DE69533385T2 (de) | 2005-08-25 |
JPH0855913A (ja) | 1996-02-27 |
US5786624A (en) | 1998-07-28 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |