DE69527146D1 - Integriertes MOS-Bauelement mit einer Gateschutzdiode - Google Patents

Integriertes MOS-Bauelement mit einer Gateschutzdiode

Info

Publication number
DE69527146D1
DE69527146D1 DE69527146T DE69527146T DE69527146D1 DE 69527146 D1 DE69527146 D1 DE 69527146D1 DE 69527146 T DE69527146 T DE 69527146T DE 69527146 T DE69527146 T DE 69527146T DE 69527146 D1 DE69527146 D1 DE 69527146D1
Authority
DE
Germany
Prior art keywords
protection diode
gate protection
integrated mos
mos component
component
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69527146T
Other languages
English (en)
Other versions
DE69527146T2 (de
Inventor
Ferruccio Frisina
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Original Assignee
CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno filed Critical CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Application granted granted Critical
Publication of DE69527146D1 publication Critical patent/DE69527146D1/de
Publication of DE69527146T2 publication Critical patent/DE69527146T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7811Vertical DMOS transistors, i.e. VDMOS transistors with an edge termination structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0255Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using diodes as protective elements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7802Vertical DMOS transistors, i.e. VDMOS transistors
    • H01L29/7803Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device
    • H01L29/7808Vertical DMOS transistors, i.e. VDMOS transistors structurally associated with at least one other device the other device being a breakdown diode, e.g. Zener diode
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0603Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
    • H01L29/0607Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
    • H01L29/0611Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
    • H01L29/0615Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/0684Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
    • H01L29/0692Surface layout
    • H01L29/0696Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69527146T 1995-11-10 1995-11-10 Integriertes MOS-Bauelement mit einer Gateschutzdiode Expired - Fee Related DE69527146T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
EP95830476A EP0773588B1 (de) 1995-11-10 1995-11-10 Integriertes MOS-Bauelement mit einer Gateschutzdiode

Publications (2)

Publication Number Publication Date
DE69527146D1 true DE69527146D1 (de) 2002-07-25
DE69527146T2 DE69527146T2 (de) 2002-12-12

Family

ID=8222056

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69527146T Expired - Fee Related DE69527146T2 (de) 1995-11-10 1995-11-10 Integriertes MOS-Bauelement mit einer Gateschutzdiode

Country Status (3)

Country Link
US (1) US5886381A (de)
EP (1) EP0773588B1 (de)
DE (1) DE69527146T2 (de)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5818084A (en) * 1996-05-15 1998-10-06 Siliconix Incorporated Pseudo-Schottky diode
JP3191747B2 (ja) * 1997-11-13 2001-07-23 富士電機株式会社 Mos型半導体素子
JPH11251594A (ja) * 1997-12-31 1999-09-17 Siliconix Inc 電圧クランプされたゲ―トを有するパワ―mosfet
EP0948050A1 (de) * 1998-03-24 1999-10-06 STMicroelectronics S.r.l. Elektronisches Leistungshalbleiterbauelement mit polykristallinen Siliziumkomponenten
US6137143A (en) * 1998-06-30 2000-10-24 Intel Corporation Diode and transistor design for high speed I/O
KR100505619B1 (ko) * 1998-09-29 2005-09-26 삼성전자주식회사 반도체소자의정전하방전회로,그구조체및그구조체의제조방법
DE19848833C1 (de) * 1998-10-22 2000-09-07 Fraunhofer Ges Forschung Transpondervorrichtung mit einer Einrichtung zum Schutz vor elektromagnetischen Störfeldern
JP2000174272A (ja) * 1998-12-09 2000-06-23 Mitsubishi Electric Corp 電力用半導体素子
JP4917709B2 (ja) 2000-03-06 2012-04-18 ローム株式会社 半導体装置
JP3549479B2 (ja) * 2000-10-16 2004-08-04 寛治 大塚 バラクタデバイスを備えた半導体集積回路
JP2002208702A (ja) * 2001-01-10 2002-07-26 Mitsubishi Electric Corp パワー半導体装置
DE10335383A1 (de) * 2003-07-28 2005-02-24 Atmel Germany Gmbh Monolithisch integrierbare Schaltungsanordnung zum Überspannungsschutz
JP4202970B2 (ja) * 2004-06-10 2008-12-24 株式会社東芝 半導体装置及びその製造方法、半導体装置の欠陥検出方法
US7375402B2 (en) * 2004-07-07 2008-05-20 Semi Solutions, Llc Method and apparatus for increasing stability of MOS memory cells
US8247840B2 (en) * 2004-07-07 2012-08-21 Semi Solutions, Llc Apparatus and method for improved leakage current of silicon on insulator transistors using a forward biased diode
US7683433B2 (en) * 2004-07-07 2010-03-23 Semi Solution, Llc Apparatus and method for improving drive-strength and leakage of deep submicron MOS transistors
US7863689B2 (en) * 2006-09-19 2011-01-04 Semi Solutions, Llc. Apparatus for using a well current source to effect a dynamic threshold voltage of a MOS transistor
US7511357B2 (en) * 2007-04-20 2009-03-31 Force-Mos Technology Corporation Trenched MOSFETs with improved gate-drain (GD) clamp diodes
US8164162B2 (en) * 2009-06-11 2012-04-24 Force Mos Technology Co., Ltd. Power semiconductor devices integrated with clamp diodes sharing same gate metal pad
CN103474426A (zh) * 2013-09-16 2013-12-25 上海恺创电子有限公司 一种高容量的耐雪崩击穿的超级结器件结构
US10319712B2 (en) 2016-11-10 2019-06-11 Texas Instruments Incorporated Integrated transistor and protection diode and fabrication method
CN109787597A (zh) 2017-11-13 2019-05-21 恩智浦有限公司 负载开关栅极保护电路

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57141962A (en) * 1981-02-27 1982-09-02 Hitachi Ltd Semiconductor integrated circuit device
JPS5825264A (ja) * 1981-08-07 1983-02-15 Hitachi Ltd 絶縁ゲート型半導体装置
JPH0693485B2 (ja) * 1985-11-29 1994-11-16 日本電装株式会社 半導体装置
JPH02185069A (ja) * 1988-12-02 1990-07-19 Motorola Inc 高エネルギー阻止能力及び温度補償された阻止電圧を具備する半導体デバイス
US5266831A (en) * 1991-11-12 1993-11-30 Motorola, Inc. Edge termination structure
GB9207860D0 (en) * 1992-04-09 1992-05-27 Philips Electronics Uk Ltd A semiconductor component
JPH06151737A (ja) * 1992-10-30 1994-05-31 Toshiba Corp 半導体装置及びその製造方法
JP2956434B2 (ja) * 1992-10-30 1999-10-04 株式会社デンソー 絶縁分離形半導体装置
EP0680089A1 (de) * 1994-04-28 1995-11-02 Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe Leistungshalbleiteranordnung mit einer integrierten Schaltungsstruktur zum Schutz gegen Überspannungen und dazugehoriges Herstellungsverfahren

Also Published As

Publication number Publication date
EP0773588A1 (de) 1997-05-14
DE69527146T2 (de) 2002-12-12
US5886381A (en) 1999-03-23
EP0773588B1 (de) 2002-06-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee