DE69508860D1 - Chip-Ausgangstreiberschaltung - Google Patents
Chip-AusgangstreiberschaltungInfo
- Publication number
- DE69508860D1 DE69508860D1 DE69508860T DE69508860T DE69508860D1 DE 69508860 D1 DE69508860 D1 DE 69508860D1 DE 69508860 T DE69508860 T DE 69508860T DE 69508860 T DE69508860 T DE 69508860T DE 69508860 D1 DE69508860 D1 DE 69508860D1
- Authority
- DE
- Germany
- Prior art keywords
- driver circuit
- output driver
- chip output
- chip
- circuit
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/003—Modifications for increasing the reliability for protection
- H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/09425—Multistate logic
- H03K19/09429—Multistate logic one of the states being the high impedance or floating state
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
- H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
- H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
- H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors
- H03K19/09482—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors using a combination of enhancement and depletion transistors
- H03K19/09485—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors using a combination of enhancement and depletion transistors with active depletion transistors
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
GB9414928A GB9414928D0 (en) | 1994-07-25 | 1994-07-25 | Off-chip driver circuit |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69508860D1 true DE69508860D1 (de) | 1999-05-12 |
DE69508860T2 DE69508860T2 (de) | 1999-09-16 |
Family
ID=10758811
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69508860T Expired - Fee Related DE69508860T2 (de) | 1994-07-25 | 1995-07-24 | Chip-Ausgangstreiberschaltung |
Country Status (5)
Country | Link |
---|---|
US (1) | US5729157A (de) |
EP (1) | EP0695037B1 (de) |
JP (1) | JP3167592B2 (de) |
DE (1) | DE69508860T2 (de) |
GB (1) | GB9414928D0 (de) |
Families Citing this family (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3441238B2 (ja) * | 1995-06-02 | 2003-08-25 | 株式会社東芝 | 出力回路 |
JP3210567B2 (ja) * | 1996-03-08 | 2001-09-17 | 株式会社東芝 | 半導体出力回路 |
DE19624474C2 (de) * | 1996-06-19 | 1998-04-23 | Sgs Thomson Microelectronics | Monolithisch integrierte Mehrfachbetriebsartenschaltung |
JP3266527B2 (ja) * | 1996-12-10 | 2002-03-18 | 富士通株式会社 | 出力ドライバ回路及び半導体装置 |
US5969541A (en) * | 1997-05-19 | 1999-10-19 | Stmicroelectronics, Inc. | Current inhibiting I/O buffer having a 5 volt tolerant input and method of inhibiting current |
US5990705A (en) * | 1997-06-04 | 1999-11-23 | Oak Technology, Inc. | CMOS I/O circuit with high-voltage input tolerance |
JP3542476B2 (ja) * | 1997-12-01 | 2004-07-14 | 三菱電機株式会社 | Soi構造のcmos回路 |
US5926056A (en) * | 1998-01-12 | 1999-07-20 | Lucent Technologies Inc. | Voltage tolerant output buffer |
JP2000252813A (ja) * | 1999-02-24 | 2000-09-14 | Texas Instr Inc <Ti> | 低電圧差動信号方式受信機用出力バッファ |
US6351160B1 (en) | 2000-12-06 | 2002-02-26 | International Business Machines Corporation | Method and apparatus for enhancing reliability of a high voltage input/output driver/receiver |
KR100500921B1 (ko) * | 2003-08-25 | 2005-07-14 | 주식회사 하이닉스반도체 | 데이터 출력드라이버의 임피던스를 조정할 수 있는 반도체메모리 장치 |
KR100543197B1 (ko) * | 2003-08-25 | 2006-01-20 | 주식회사 하이닉스반도체 | 데이터 출력드라이버 |
US6861874B1 (en) * | 2003-10-07 | 2005-03-01 | Faraday Technology Corp. | Input/output buffer |
US10135443B1 (en) | 2017-08-03 | 2018-11-20 | Bae Systems Information And Electronic Systems Integration Inc. | Extended voltage range coldspare tolerant off chip driver |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB1375958A (en) * | 1972-06-29 | 1974-12-04 | Ibm | Pulse circuit |
US4709162A (en) | 1986-09-18 | 1987-11-24 | International Business Machines Corporation | Off-chip driver circuits |
US4782250A (en) * | 1987-08-31 | 1988-11-01 | International Business Machines Corporation | CMOS off-chip driver circuits |
US4963766A (en) * | 1989-06-28 | 1990-10-16 | Digital Equipment Corporation | Low-voltage CMOS output buffer |
US5151619A (en) | 1990-10-11 | 1992-09-29 | International Business Machines Corporation | Cmos off chip driver circuit |
US5160855A (en) * | 1991-06-28 | 1992-11-03 | Digital Equipment Corporation | Floating-well CMOS output driver |
US5406140A (en) * | 1993-06-07 | 1995-04-11 | National Semiconductor Corporation | Voltage translation and overvoltage protection |
JP2671787B2 (ja) * | 1993-12-24 | 1997-10-29 | 日本電気株式会社 | 出力バッファ回路 |
US5576635A (en) * | 1995-02-14 | 1996-11-19 | Advanced Micro Devices, Inc. | Output buffer with improved tolerance to overvoltage |
US5635861A (en) * | 1995-05-23 | 1997-06-03 | International Business Machines Corporation | Off chip driver circuit |
-
1994
- 1994-07-25 GB GB9414928A patent/GB9414928D0/en active Pending
-
1995
- 1995-07-24 DE DE69508860T patent/DE69508860T2/de not_active Expired - Fee Related
- 1995-07-24 EP EP95305148A patent/EP0695037B1/de not_active Expired - Lifetime
- 1995-07-25 US US08/506,879 patent/US5729157A/en not_active Expired - Lifetime
- 1995-07-25 JP JP18893595A patent/JP3167592B2/ja not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JPH08125522A (ja) | 1996-05-17 |
JP3167592B2 (ja) | 2001-05-21 |
GB9414928D0 (en) | 1994-09-14 |
EP0695037A1 (de) | 1996-01-31 |
US5729157A (en) | 1998-03-17 |
DE69508860T2 (de) | 1999-09-16 |
EP0695037B1 (de) | 1999-04-07 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |