DE69503824T2 - Verfahren von Ternär-C4 Typ bei niedriger Temperatur - Google Patents

Verfahren von Ternär-C4 Typ bei niedriger Temperatur

Info

Publication number
DE69503824T2
DE69503824T2 DE69503824T DE69503824T DE69503824T2 DE 69503824 T2 DE69503824 T2 DE 69503824T2 DE 69503824 T DE69503824 T DE 69503824T DE 69503824 T DE69503824 T DE 69503824T DE 69503824 T2 DE69503824 T2 DE 69503824T2
Authority
DE
Germany
Prior art keywords
chip
solder
alloy
chip carrier
composition
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69503824T
Other languages
German (de)
English (en)
Other versions
DE69503824D1 (de
Inventor
Thomas Patrick Endwell New York 13760 Gall
Anthony Paul Endicott New York 13760 Ingraham
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE69503824D1 publication Critical patent/DE69503824D1/de
Application granted granted Critical
Publication of DE69503824T2 publication Critical patent/DE69503824T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
    • H10W72/01233—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01235—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/016—Manufacture or treatment of strap connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07234—Using a reflow oven
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07235—Applying EM radiation, e.g. induction heating or using a laser
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu

Landscapes

  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
DE69503824T 1994-04-19 1995-02-08 Verfahren von Ternär-C4 Typ bei niedriger Temperatur Expired - Lifetime DE69503824T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/229,883 US5391514A (en) 1994-04-19 1994-04-19 Low temperature ternary C4 flip chip bonding method

Publications (2)

Publication Number Publication Date
DE69503824D1 DE69503824D1 (de) 1998-09-10
DE69503824T2 true DE69503824T2 (de) 1999-04-15

Family

ID=22863048

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69503824T Expired - Lifetime DE69503824T2 (de) 1994-04-19 1995-02-08 Verfahren von Ternär-C4 Typ bei niedriger Temperatur

Country Status (8)

Country Link
US (1) US5391514A (enExample)
EP (1) EP0678908B1 (enExample)
JP (1) JP2758373B2 (enExample)
KR (1) KR0167470B1 (enExample)
CN (1) CN1066578C (enExample)
DE (1) DE69503824T2 (enExample)
MY (1) MY113781A (enExample)
TW (1) TW267249B (enExample)

Families Citing this family (38)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5859470A (en) * 1992-11-12 1999-01-12 International Business Machines Corporation Interconnection of a carrier substrate and a semiconductor device
JP3348528B2 (ja) * 1994-07-20 2002-11-20 富士通株式会社 半導体装置の製造方法と半導体装置及び電子回路装置の製造方法と電子回路装置
US5672545A (en) * 1994-08-08 1997-09-30 Santa Barbara Research Center Thermally matched flip-chip detector assembly and method
FI98899C (fi) * 1994-10-28 1997-09-10 Jorma Kalevi Kivilahti Menetelmä elektroniikan komponenttien liittämiseksi juottamalla
US5985692A (en) * 1995-06-07 1999-11-16 Microunit Systems Engineering, Inc. Process for flip-chip bonding a semiconductor die having gold bump electrodes
US6336262B1 (en) 1996-10-31 2002-01-08 International Business Machines Corporation Process of forming a capacitor with multi-level interconnection technology
US5808853A (en) * 1996-10-31 1998-09-15 International Business Machines Corporation Capacitor with multi-level interconnection technology
US5891754A (en) * 1997-02-11 1999-04-06 Delco Electronics Corp. Method of inspecting integrated circuit solder joints with x-ray detectable encapsulant
US6025649A (en) 1997-07-22 2000-02-15 International Business Machines Corporation Pb-In-Sn tall C-4 for fatigue enhancement
US5937320A (en) * 1998-04-08 1999-08-10 International Business Machines Corporation Barrier layers for electroplated SnPb eutectic solder joints
US6127731A (en) * 1999-03-11 2000-10-03 International Business Machines Corporation Capped solder bumps which form an interconnection with a tailored reflow melting point
US6303400B1 (en) 1999-09-23 2001-10-16 International Business Machines Corporation Temporary attach article and method for temporary attach of devices to a substrate
KR100319813B1 (ko) * 2000-01-03 2002-01-09 윤종용 유비엠 언더컷을 개선한 솔더 범프의 형성 방법
ATE365378T1 (de) * 2000-07-28 2007-07-15 Infineon Technologies Ag Verfahren zur kontaktierung eines halbleiterbauelementes
EP1332654B1 (en) * 2000-11-10 2005-01-12 Unitive Electronics, Inc. Methods of positioning components using liquid prime movers and related structures
US6863209B2 (en) 2000-12-15 2005-03-08 Unitivie International Limited Low temperature methods of bonding components
US7547623B2 (en) 2002-06-25 2009-06-16 Unitive International Limited Methods of forming lead free solder bumps
US6960828B2 (en) 2002-06-25 2005-11-01 Unitive International Limited Electronic structures including conductive shunt layers
US7531898B2 (en) * 2002-06-25 2009-05-12 Unitive International Limited Non-Circular via holes for bumping pads and related structures
US20040084206A1 (en) * 2002-11-06 2004-05-06 I-Chung Tung Fine pad pitch organic circuit board for flip chip joints and board to board solder joints and method
TWI225899B (en) * 2003-02-18 2005-01-01 Unitive Semiconductor Taiwan C Etching solution and method for manufacturing conductive bump using the etching solution to selectively remove barrier layer
JP4458043B2 (ja) * 2003-06-09 2010-04-28 千住金属工業株式会社 ソルダペースト
US7049170B2 (en) * 2003-12-17 2006-05-23 Tru-Si Technologies, Inc. Integrated circuits and packaging substrates with cavities, and attachment methods including insertion of protruding contact pads into cavities
US7060601B2 (en) * 2003-12-17 2006-06-13 Tru-Si Technologies, Inc. Packaging substrates for integrated circuits and soldering methods
US7427557B2 (en) * 2004-03-10 2008-09-23 Unitive International Limited Methods of forming bumps using barrier layers as etch masks
TW200603698A (en) 2004-04-13 2006-01-16 Unitive International Ltd Methods of forming solder bumps on exposed metal pads and related structures
US20060205170A1 (en) * 2005-03-09 2006-09-14 Rinne Glenn A Methods of forming self-healing metal-insulator-metal (MIM) structures and related devices
US7932615B2 (en) * 2006-02-08 2011-04-26 Amkor Technology, Inc. Electronic devices including solder bumps on compliant dielectric layers
US7674701B2 (en) 2006-02-08 2010-03-09 Amkor Technology, Inc. Methods of forming metal layers using multi-layer lift-off patterns
KR100969441B1 (ko) * 2008-06-05 2010-07-14 삼성전기주식회사 반도체칩이 실장된 인쇄회로기판 및 그 제조방법
EP2180770A1 (en) 2008-10-21 2010-04-28 Atotech Deutschland Gmbh Method to form solder deposits on substrates
EP2244285A1 (en) 2009-04-24 2010-10-27 ATOTECH Deutschland GmbH Method to form solder deposits on substrates
EP2405469B1 (en) 2010-07-05 2016-09-21 ATOTECH Deutschland GmbH Method to form solder alloy deposits on substrates
EP2405468A1 (en) 2010-07-05 2012-01-11 ATOTECH Deutschland GmbH Method to form solder deposits on substrates
US20130105329A1 (en) 2010-08-02 2013-05-02 Atotech Deutschland Gmbh Method to form solder deposits and non-melting bump structures on substrates
EP2416634A1 (en) 2010-08-02 2012-02-08 ATOTECH Deutschland GmbH Method to form solder deposits on substrates
EP2506690A1 (en) 2011-03-28 2012-10-03 Atotech Deutschland GmbH Method to form solder deposits and non-melting bump structures on substrates
US9746583B2 (en) * 2014-08-27 2017-08-29 General Electric Company Gas well integrity inspection system

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3678569A (en) * 1970-07-15 1972-07-25 Globe Union Inc Method for forming ohmic contacts
DE3785720T2 (de) * 1986-09-25 1993-08-12 Toshiba Kawasaki Kk Verfahren zum herstellen eines filmtraegers.
US4912545A (en) * 1987-09-16 1990-03-27 Irvine Sensors Corporation Bonding of aligned conductive bumps on adjacent surfaces
US4806309A (en) * 1988-01-05 1989-02-21 Willard Industries, Inc. Tin base lead-free solder composition containing bismuth, silver and antimony
JPH0432234A (ja) * 1990-05-28 1992-02-04 Mitsubishi Electric Corp フリップチップボンディング用バンプ構造
JPH05235388A (ja) * 1992-02-24 1993-09-10 Mitsubishi Electric Corp 低抵抗線状パターンの形成方法及び形成装置並びに太陽電池
US5316205A (en) * 1993-04-05 1994-05-31 Motorola, Inc. Method for forming gold bump connection using tin-bismuth solder

Also Published As

Publication number Publication date
DE69503824D1 (de) 1998-09-10
US5391514A (en) 1995-02-21
MY113781A (en) 2002-05-31
EP0678908B1 (en) 1998-08-05
TW267249B (enExample) 1996-01-01
KR950030285A (ko) 1995-11-24
CN1111822A (zh) 1995-11-15
JPH07297229A (ja) 1995-11-10
KR0167470B1 (ko) 1999-02-01
EP0678908A1 (en) 1995-10-25
JP2758373B2 (ja) 1998-05-28
CN1066578C (zh) 2001-05-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8330 Complete renunciation