DE69428329D1 - Feldeffekttransistor mit einem versiegelten diffundierten Übergang - Google Patents

Feldeffekttransistor mit einem versiegelten diffundierten Übergang

Info

Publication number
DE69428329D1
DE69428329D1 DE69428329T DE69428329T DE69428329D1 DE 69428329 D1 DE69428329 D1 DE 69428329D1 DE 69428329 T DE69428329 T DE 69428329T DE 69428329 T DE69428329 T DE 69428329T DE 69428329 D1 DE69428329 D1 DE 69428329D1
Authority
DE
Germany
Prior art keywords
sealed
field effect
effect transistor
diffused junction
diffused
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69428329T
Other languages
English (en)
Other versions
DE69428329T2 (de
Inventor
Kuo-Hua Lee
Chun-Ting Liu
Ruichen Liu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
AT&T Corp
Original Assignee
AT&T Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by AT&T Corp filed Critical AT&T Corp
Application granted granted Critical
Publication of DE69428329D1 publication Critical patent/DE69428329D1/de
Publication of DE69428329T2 publication Critical patent/DE69428329T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0843—Source or drain regions of field-effect devices
    • H01L29/0847—Source or drain regions of field-effect devices of field-effect transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H01L21/2251—Diffusion into or out of group IV semiconductors
    • H01L21/2254—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides
    • H01L21/2257—Diffusion into or out of group IV semiconductors from or through or into an applied layer, e.g. photoresist, nitrides the applied layer being silicon or silicide or SIPOS, e.g. polysilicon, porous silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H01L29/456—Ohmic electrodes on silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66568—Lateral single gate silicon transistors
    • H01L29/66575—Lateral single gate silicon transistors where the source and drain or source and drain extensions are self-aligned to the sides of the gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)
DE69428329T 1993-12-01 1994-11-23 Feldeffekttransistor mit einem versiegelten diffundierten Übergang Expired - Fee Related DE69428329T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/160,600 US5420058A (en) 1993-12-01 1993-12-01 Method of making field effect transistor with a sealed diffusion junction

Publications (2)

Publication Number Publication Date
DE69428329D1 true DE69428329D1 (de) 2001-10-25
DE69428329T2 DE69428329T2 (de) 2002-07-04

Family

ID=22577547

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69428329T Expired - Fee Related DE69428329T2 (de) 1993-12-01 1994-11-23 Feldeffekttransistor mit einem versiegelten diffundierten Übergang

Country Status (6)

Country Link
US (1) US5420058A (de)
EP (1) EP0656645B1 (de)
JP (1) JP2944903B2 (de)
KR (1) KR0184616B1 (de)
DE (1) DE69428329T2 (de)
TW (1) TW268141B (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950011982B1 (ko) * 1992-11-06 1995-10-13 현대전자산업주식회사 전도물질 패드를 갖는 반도체 접속장치 및 그 제조방법
US5945738A (en) * 1994-05-31 1999-08-31 Stmicroelectronics, Inc. Dual landing pad structure in an integrated circuit
US5633196A (en) * 1994-05-31 1997-05-27 Sgs-Thomson Microelectronics, Inc. Method of forming a barrier and landing pad structure in an integrated circuit
US5956615A (en) * 1994-05-31 1999-09-21 Stmicroelectronics, Inc. Method of forming a metal contact to landing pad structure in an integrated circuit
US5702979A (en) * 1994-05-31 1997-12-30 Sgs-Thomson Microelectronics, Inc. Method of forming a landing pad structure in an integrated circuit
US5705427A (en) * 1994-12-22 1998-01-06 Sgs-Thomson Microelectronics, Inc. Method of forming a landing pad structure in an integrated circuit
JP4156044B2 (ja) * 1994-12-22 2008-09-24 エスティーマイクロエレクトロニクス，インコーポレイテッド 集積回路におけるランディングパッド構成体の製造方法
US5686761A (en) * 1995-06-06 1997-11-11 Advanced Micro Devices, Inc. Production worthy interconnect process for deep sub-half micrometer back-end-of-line technology
US5719071A (en) * 1995-12-22 1998-02-17 Sgs-Thomson Microelectronics, Inc. Method of forming a landing pad sturcture in an integrated circuit
US6080644A (en) 1998-02-06 2000-06-27 Burr-Brown Corporation Complementary bipolar/CMOS epitaxial structure and process
US6274464B2 (en) 1998-02-06 2001-08-14 Texas Instruments Incorporated Epitaxial cleaning process using HCL and N-type dopant gas to reduce defect density and auto doping effects
US6096599A (en) * 1998-11-06 2000-08-01 Advanced Micro Devices, Inc. Formation of junctions by diffusion from a doped film into and through a silicide during silicidation
US6380040B1 (en) 1999-08-02 2002-04-30 Advanced Micro Devices, Inc. Prevention of dopant out-diffusion during silicidation and junction formation

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4788160A (en) * 1987-03-31 1988-11-29 Texas Instruments Incorporated Process for formation of shallow silicided junctions
US4764481A (en) * 1987-08-24 1988-08-16 Delco Electronics Corporation Grown side-wall silicided source/drain self-align CMOS fabrication process
US4922311A (en) * 1987-12-04 1990-05-01 American Telephone And Telegraph Company Folded extended window field effect transistor
US4844776A (en) * 1987-12-04 1989-07-04 American Telephone And Telegraph Company, At&T Bell Laboratories Method for making folded extended window field effect transistor
US4923822A (en) * 1989-05-22 1990-05-08 Hewlett-Packard Company Method of fabricating a semiconductor device by capping a conductive layer with a nitride layer
US5206187A (en) * 1991-08-30 1993-04-27 Micron Technology, Inc. Method of processing semiconductor wafers using a contact etch stop

Also Published As

Publication number Publication date
JP2944903B2 (ja) 1999-09-06
EP0656645A3 (de) 1996-07-31
TW268141B (de) 1996-01-11
EP0656645A2 (de) 1995-06-07
KR950021768A (ko) 1995-07-26
US5420058A (en) 1995-05-30
DE69428329T2 (de) 2002-07-04
KR0184616B1 (en) 1999-03-20
JPH07202201A (ja) 1995-08-04
EP0656645B1 (de) 2001-09-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee