DE69420389T2 - Sicherungsschaltkreis, der Sicherungsschmelzung emulieren kann - Google Patents

Sicherungsschaltkreis, der Sicherungsschmelzung emulieren kann

Info

Publication number
DE69420389T2
DE69420389T2 DE69420389T DE69420389T DE69420389T2 DE 69420389 T2 DE69420389 T2 DE 69420389T2 DE 69420389 T DE69420389 T DE 69420389T DE 69420389 T DE69420389 T DE 69420389T DE 69420389 T2 DE69420389 T2 DE 69420389T2
Authority
DE
Germany
Prior art keywords
fuse
emulate
fuses
circuit
fuse circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69420389T
Other languages
English (en)
Other versions
DE69420389D1 (de
Inventor
David Charles Mcclure
William Carl Slemmer
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics lnc USA
Original Assignee
STMicroelectronics lnc USA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by STMicroelectronics lnc USA filed Critical STMicroelectronics lnc USA
Application granted granted Critical
Publication of DE69420389D1 publication Critical patent/DE69420389D1/de
Publication of DE69420389T2 publication Critical patent/DE69420389T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G11C29/24—Accessing extra cells, e.g. dummy cells or redundant cells
DE69420389T 1994-03-31 1994-12-02 Sicherungsschaltkreis, der Sicherungsschmelzung emulieren kann Expired - Fee Related DE69420389T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US08/220,976 US5517455A (en) 1994-03-31 1994-03-31 Integrated circuit with fuse circuitry simulating fuse blowing

Publications (2)

Publication Number Publication Date
DE69420389D1 DE69420389D1 (de) 1999-10-07
DE69420389T2 true DE69420389T2 (de) 2000-03-23

Family

ID=22825824

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69420389T Expired - Fee Related DE69420389T2 (de) 1994-03-31 1994-12-02 Sicherungsschaltkreis, der Sicherungsschmelzung emulieren kann

Country Status (4)

Country Link
US (1) US5517455A (de)
EP (1) EP0675439B1 (de)
JP (1) JPH07288078A (de)
DE (1) DE69420389T2 (de)

Families Citing this family (28)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3441780B2 (ja) * 1994-02-21 2003-09-02 日本テキサス・インスツルメンツ株式会社 クロック信号生成回路
JPH08111098A (ja) * 1994-10-12 1996-04-30 Nec Corp メモリ回路
JPH08212797A (ja) * 1995-01-31 1996-08-20 Nec Corp 半導体装置
US5838620A (en) * 1995-04-05 1998-11-17 Micron Technology, Inc. Circuit for cancelling and replacing redundant elements
KR0146203B1 (ko) * 1995-06-26 1998-12-01 김광호 반도체 집적회로의 회로소자값 조정회로
US5812468A (en) * 1995-11-28 1998-09-22 Micron Technology, Inc. Programmable device for redundant element cancel in a memory
US5731760A (en) * 1996-05-31 1998-03-24 Advanced Micro Devices Inc. Apparatus for preventing accidental or intentional fuse blowing
US5912579A (en) * 1997-02-06 1999-06-15 Zagar; Paul S. Circuit for cancelling and replacing redundant elements
US6055611A (en) * 1997-07-09 2000-04-25 Micron Technology, Inc. Method and apparatus for enabling redundant memory
GB2329289A (en) * 1997-08-27 1999-03-17 Ericsson Telefon Ab L M Antifuse-controlled analogue circuit trimming with security locking antifuse
US6108804A (en) * 1997-09-11 2000-08-22 Micron Technology, Inc. Method and apparatus for testing adjustment of a circuit parameter
US6114878A (en) * 1998-02-13 2000-09-05 Micron Technology, Inc. Circuit for contact pad isolation
US6278468B1 (en) * 1998-03-30 2001-08-21 Xerox Corporation Liquid ink printhead including a programmable temperature sensing device
US6037831A (en) * 1998-03-30 2000-03-14 Xerox Corporation Fusible link circuit including a preview feature
KR100359855B1 (ko) * 1998-06-30 2003-01-15 주식회사 하이닉스반도체 가변전압발생기를이용한앤티퓨즈의프로그래밍회로
US5973977A (en) * 1998-07-06 1999-10-26 Pmc-Sierra Ltd. Poly fuses in CMOS integrated circuits
US5999038A (en) * 1998-09-24 1999-12-07 Atmel Corporation Fuse circuit having zero power draw for partially blown condition
JP3866451B2 (ja) * 1999-06-24 2007-01-10 Ｎｅｃエレクトロニクス株式会社 冗長プログラム回路及びこれを内蔵した半導体記憶装置
DE10206249B4 (de) * 2002-02-15 2004-04-29 Infineon Technologies Ag Verfahren zum Erzeugen von Testsignalen für eine integrierte Schaltung sowie Testlogik
US6621324B2 (en) * 2002-02-19 2003-09-16 International Business Machines Corporation Redundant antifuse segments for improved programming efficiency
KR100554982B1 (ko) * 2003-12-01 2006-03-03 주식회사 하이닉스반도체 반도체 기억 소자에서의 퓨즈 처리 회로 및 그 방법
US7413805B2 (en) * 2005-02-25 2008-08-19 Fry's Metals, Inc. Preparation of metallic particles for electrokinetic or electrostatic deposition
KR100652412B1 (ko) * 2005-06-01 2006-12-01 삼성전자주식회사 정보 보호가 필요한 장치에 접근을 완전히 차단하는 회로및 방법
WO2009008078A1 (ja) * 2007-07-11 2009-01-15 Fujitsu Microelectronics Limited 半導体記憶装置及びシステム
JP5278007B2 (ja) * 2009-02-02 2013-09-04 株式会社オートネットワーク技術研究所 ヒューズの温度推定方法及びヒューズ装置
US8234543B2 (en) * 2009-03-06 2012-07-31 Via Technologies, Inc. Detection and correction of fuse re-growth in a microprocessor
US8281222B2 (en) * 2009-08-07 2012-10-02 Via Technologies, Inc. Detection and correction of fuse re-growth in a microprocessor
CN103700405B (zh) * 2013-12-04 2016-06-15 无锡华润矽科微电子有限公司 可模拟熔断的熔丝电路

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4621346A (en) * 1984-09-20 1986-11-04 Texas Instruments Incorporated Low power CMOS fuse circuit
US5204559A (en) * 1991-01-23 1993-04-20 Vitesse Semiconductor Corporation Method and apparatus for controlling clock skew
US5206583A (en) * 1991-08-20 1993-04-27 International Business Machines Corporation Latch assisted fuse testing for customized integrated circuits
US5471426A (en) * 1992-01-31 1995-11-28 Sgs-Thomson Microelectronics, Inc. Redundancy decoder
JPH05234396A (ja) * 1992-02-21 1993-09-10 Fujitsu Ltd 半導体記憶装置
US5361001A (en) * 1993-12-03 1994-11-01 Motorola, Inc. Circuit and method of previewing analog trimming

Also Published As

Publication number Publication date
EP0675439B1 (de) 1999-09-01
US5517455A (en) 1996-05-14
EP0675439A1 (de) 1995-10-04
JPH07288078A (ja) 1995-10-31
DE69420389D1 (de) 1999-10-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee