DE69318894D1 - Gehäuse einer elektronischen Vorrichtung mit einem metallischen Insert und Verfahren zur Oberflächenaufrauhung des Inserts - Google Patents

Gehäuse einer elektronischen Vorrichtung mit einem metallischen Insert und Verfahren zur Oberflächenaufrauhung des Inserts

Info

Publication number
DE69318894D1
DE69318894D1 DE69318894T DE69318894T DE69318894D1 DE 69318894 D1 DE69318894 D1 DE 69318894D1 DE 69318894 T DE69318894 T DE 69318894T DE 69318894 T DE69318894 T DE 69318894T DE 69318894 D1 DE69318894 D1 DE 69318894D1
Authority
DE
Germany
Prior art keywords
insert
roughening
housing
electronic device
metallic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69318894T
Other languages
English (en)
Other versions
DE69318894T2 (de
Inventor
Toshihiko Shimada
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Application granted granted Critical
Publication of DE69318894D1 publication Critical patent/DE69318894D1/de
Publication of DE69318894T2 publication Critical patent/DE69318894T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49579—Lead-frames or other flat leads characterised by the materials of the lead frames or layers thereon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12014—All metal or with adjacent metals having metal particles
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/12—All metal or with adjacent metals
    • Y10T428/12014—All metal or with adjacent metals having metal particles
    • Y10T428/12028—Composite; i.e., plural, adjacent, spatially distinct metal components [e.g., layers, etc.]

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Chemically Coating (AREA)
DE69318894T 1992-07-11 1993-07-09 Gehäuse einer elektronischen Vorrichtung mit einem metallischen Insert und Verfahren zur Oberflächenaufrauhung des Inserts Expired - Fee Related DE69318894T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20748092A JP3228789B2 (ja) 1992-07-11 1992-07-11 樹脂用インサート部材の製造方法

Publications (2)

Publication Number Publication Date
DE69318894D1 true DE69318894D1 (de) 1998-07-09
DE69318894T2 DE69318894T2 (de) 1998-09-24

Family

ID=16540451

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69318894T Expired - Fee Related DE69318894T2 (de) 1992-07-11 1993-07-09 Gehäuse einer elektronischen Vorrichtung mit einem metallischen Insert und Verfahren zur Oberflächenaufrauhung des Inserts

Country Status (6)

Country Link
US (1) US5585195A (de)
EP (1) EP0579464B1 (de)
JP (1) JP3228789B2 (de)
KR (1) KR940006254A (de)
DE (1) DE69318894T2 (de)
SG (1) SG46235A1 (de)

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US5696756A (en) * 1995-04-14 1997-12-09 Kabushiki Kaishia Toshiba Optical disk having an evaluation pattern for evaluating the optical disk
US6055140A (en) * 1997-07-25 2000-04-25 Seagate Technology, Inc. Rigid disc plastic substrate with high stiffness insert
US6141870A (en) 1997-08-04 2000-11-07 Peter K. Trzyna Method for making electrical device
JPH11189835A (ja) * 1997-12-25 1999-07-13 Jst Mfg Co Ltd すず−ニッケル合金およびこの合金により表面処理を施した部品
US6509632B1 (en) 1998-01-30 2003-01-21 Micron Technology, Inc. Method of fabricating a redundant pinout configuration for signal enhancement in an IC package
US6683368B1 (en) 2000-06-09 2004-01-27 National Semiconductor Corporation Lead frame design for chip scale package
US6689640B1 (en) 2000-10-26 2004-02-10 National Semiconductor Corporation Chip scale pin array
US6551859B1 (en) * 2001-02-22 2003-04-22 National Semiconductor Corporation Chip scale and land grid array semiconductor packages
JP2002299538A (ja) * 2001-03-30 2002-10-11 Dainippon Printing Co Ltd リードフレーム及びそれを用いた半導体パッケージ
JP3841768B2 (ja) 2003-05-22 2006-11-01 新光電気工業株式会社 パッケージ部品及び半導体パッケージ
US7049683B1 (en) * 2003-07-19 2006-05-23 Ns Electronics Bangkok (1993) Ltd. Semiconductor package including organo-metallic coating formed on surface of leadframe roughened using chemical etchant to prevent separation between leadframe and molding compound
DE10348715B4 (de) * 2003-10-16 2006-05-04 Infineon Technologies Ag Verfahren zum Herstellen eines Flachleiterrahmens mit verbesserter Haftung zwischen diesem und Kunststoff sowie Flachleiterrahmen
US7095096B1 (en) 2004-08-16 2006-08-22 National Semiconductor Corporation Microarray lead frame
KR20060030356A (ko) * 2004-10-05 2006-04-10 삼성테크윈 주식회사 반도체 리이드 프레임과, 이를 포함하는 반도체 패키지와,이를 도금하는 방법
US7846775B1 (en) 2005-05-23 2010-12-07 National Semiconductor Corporation Universal lead frame for micro-array packages
KR101241735B1 (ko) 2008-09-05 2013-03-08 엘지이노텍 주식회사 리드 프레임 및 그 제조방법
US8110500B2 (en) 2008-10-21 2012-02-07 International Business Machines Corporation Mitigation of plating stub resonance by controlling surface roughness
KR20100103015A (ko) * 2009-03-12 2010-09-27 엘지이노텍 주식회사 리드 프레임 및 그 제조방법
KR101113891B1 (ko) 2009-10-01 2012-02-29 삼성테크윈 주식회사 리드 프레임 및 리드 프레임 제조 방법
US9032741B2 (en) 2009-11-09 2015-05-19 Sumitomo Heavy Industries, Ltd. Cryopump and vacuum pumping method
JP5553638B2 (ja) 2010-02-19 2014-07-16 住友重機械工業株式会社 コールドトラップ、及び真空排気装置
JP6366032B2 (ja) * 2013-11-29 2018-08-01 大口マテリアル株式会社 リードフレームおよびその製造方法
JP6345342B2 (ja) * 2015-04-15 2018-06-20 三菱電機株式会社 半導体装置
WO2017077903A1 (ja) 2015-11-05 2017-05-11 古河電気工業株式会社 リードフレーム材およびその製造方法
DE102016117841A1 (de) 2016-09-21 2018-03-22 HYUNDAI Motor Company 231 Packung mit aufgerauter verkapselter Oberfläche zur Förderung einer Haftung
WO2018123708A1 (ja) 2016-12-27 2018-07-05 古河電気工業株式会社 リードフレーム材およびその製造方法ならびに半導体パッケージ
JP6805217B2 (ja) 2018-10-18 2020-12-23 Ｊｘ金属株式会社 導電性材料、成型品及び電子部品
JP7014695B2 (ja) 2018-10-18 2022-02-01 Ｊｘ金属株式会社 導電性材料、成型品及び電子部品

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5730355A (en) * 1980-07-29 1982-02-18 Tanaka Denshi Kogyo Kk Plating structure for semiconductor material
JPS59136957A (ja) * 1983-01-27 1984-08-06 Seiko Epson Corp フイルムキヤリアのフレキシブルテ−プ製造方法
US4529667A (en) * 1983-04-06 1985-07-16 The Furukawa Electric Company, Ltd. Silver-coated electric composite materials
JPH0612796B2 (ja) * 1984-06-04 1994-02-16 株式会社日立製作所 半導体装置
JPS63160367A (ja) * 1986-12-24 1988-07-04 Hitachi Ltd 樹脂封止型半導体装置
JPS63249361A (ja) * 1987-04-06 1988-10-17 Nippon Mining Co Ltd 半導体リ−ドフレ−ム
JPS6418246A (en) * 1987-07-14 1989-01-23 Shinko Electric Ind Co Lead frame for semiconductor device
JPS6465898A (en) * 1987-09-04 1989-03-13 Fujitsu Ltd Manufacture of multilayer printed board
JPH02129325A (ja) * 1988-11-08 1990-05-17 Sumitomo Metal Mining Co Ltd 高力銅合金
JPH02209759A (ja) * 1989-02-09 1990-08-21 Shinko Electric Ind Co Ltd リードフレーム
JPH02308555A (ja) * 1989-05-24 1990-12-21 Toshiba Corp 電子部品の封止構造およびその封止方法
KR920000127A (ko) * 1990-02-26 1992-01-10 미다 가쓰시게 반도체 패키지와 그것을 위한 리드프레임

Also Published As

Publication number Publication date
SG46235A1 (en) 1998-02-20
DE69318894T2 (de) 1998-09-24
EP0579464A2 (de) 1994-01-19
US5585195A (en) 1996-12-17
EP0579464A3 (de) 1994-03-23
JP3228789B2 (ja) 2001-11-12
EP0579464B1 (de) 1998-06-03
KR940006254A (ko) 1994-03-23
JPH0629439A (ja) 1994-02-04

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee