DE69211609D1 - Harzverkapselte Halbleiteranordnung und vollständig isoliert für hohe Spannungen - Google Patents

Harzverkapselte Halbleiteranordnung und vollständig isoliert für hohe Spannungen

Info

Publication number
DE69211609D1
DE69211609D1 DE69211609T DE69211609T DE69211609D1 DE 69211609 D1 DE69211609 D1 DE 69211609D1 DE 69211609 T DE69211609 T DE 69211609T DE 69211609 T DE69211609 T DE 69211609T DE 69211609 D1 DE69211609 D1 DE 69211609D1
Authority
DE
Germany
Prior art keywords
semiconductor device
high voltages
encapsulated semiconductor
resin encapsulated
fully insulated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69211609T
Other languages
English (en)
Other versions
DE69211609T2 (de
Inventor
Marcantonio Mangiagli
Rosario Pogliese
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Original Assignee
CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno filed Critical CORIMME Consorzio per Ricerca Sulla Microelettronica nel Mezzogiorno
Publication of DE69211609D1 publication Critical patent/DE69211609D1/de
Application granted granted Critical
Publication of DE69211609T2 publication Critical patent/DE69211609T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H01L23/49562—Geometry of the lead-frame for devices being provided for in H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
DE69211609T 1991-04-26 1992-04-21 Harzverkapselte Halbleiteranordnung und vollständig isoliert für hohe Spannungen Expired - Fee Related DE69211609T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
ITCT910010A IT1249388B (it) 1991-04-26 1991-04-26 Dispositivo a semiconduttore incapsulato in resina e completamente isolato per alte tensioni

Publications (2)

Publication Number Publication Date
DE69211609D1 true DE69211609D1 (de) 1996-07-25
DE69211609T2 DE69211609T2 (de) 1996-11-21

Family

ID=11348409

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69211609T Expired - Fee Related DE69211609T2 (de) 1991-04-26 1992-04-21 Harzverkapselte Halbleiteranordnung und vollständig isoliert für hohe Spannungen

Country Status (5)

Country Link
US (1) US6320258B1 (de)
EP (1) EP0511702B1 (de)
JP (1) JP3140550B2 (de)
DE (1) DE69211609T2 (de)
IT (1) IT1249388B (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6476481B2 (en) 1998-05-05 2002-11-05 International Rectifier Corporation High current capacity semiconductor device package and lead frame with large area connection posts and modified outline
JP4150508B2 (ja) * 2001-04-03 2008-09-17 三菱電機株式会社 電力用半導体装置
US6608373B2 (en) * 2001-10-03 2003-08-19 Lite-On Semiconductor Corp. Support structure for power element
WO2003065449A2 (de) 2002-01-30 2003-08-07 Papst-Motoren Gmbh & Co Kg Leistungs-halbleiter, und verfahen zu seiner herstellung
JP2004281887A (ja) * 2003-03-18 2004-10-07 Himeji Toshiba Ep Corp リードフレーム及びそれを用いた電子部品
US7875962B2 (en) * 2007-10-15 2011-01-25 Power Integrations, Inc. Package for a power semiconductor device
US8207455B2 (en) 2009-07-31 2012-06-26 Power Integrations, Inc. Power semiconductor package with bottom surface protrusions
TWI536524B (zh) * 2014-01-10 2016-06-01 萬國半導體股份有限公司 抑制爬電現象的半導體裝置及製備方法
KR102192997B1 (ko) 2014-01-27 2020-12-18 삼성전자주식회사 반도체 소자
JP6345608B2 (ja) * 2015-01-19 2018-06-20 新電元工業株式会社 半導体装置
DE102015109073B4 (de) * 2015-06-09 2023-08-10 Infineon Technologies Ag Elektronische Vorrichtungen mit erhöhten Kriechstrecken
JP7491188B2 (ja) * 2020-11-09 2024-05-28 株式会社デンソー 電気機器
DE102020131722A1 (de) 2020-11-30 2022-06-02 Brose Fahrzeugteile Se & Co. Kommanditgesellschaft, Bamberg Elektronikbauelement zur elektronischen Umsetzung einer Komfortfunktion eines Kraftfahrzeugs

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5550648A (en) * 1978-10-06 1980-04-12 Mitsubishi Electric Corp Resin sealing type semiconductor device
JPS58209147A (ja) * 1982-05-31 1983-12-06 Toshiba Corp 樹脂封止型半導体装置
JPS62282451A (ja) 1986-05-30 1987-12-08 Mitsubishi Electric Corp 樹脂封止形半導体装置
EP0257681A3 (de) * 1986-08-27 1990-02-07 STMicroelectronics S.r.l. Verfahren zur Herstellung von in Kunststoff eingeschmolzenen Halbleiterbauelementen und damit hergestellte Bauelemente
JPS63107159A (ja) * 1986-10-24 1988-05-12 Toshiba Corp 半導体装置
JPS63169050A (ja) 1987-01-05 1988-07-13 Nec Corp Ｉｃパツケ−ジ
JPH03108744A (ja) * 1989-09-22 1991-05-08 Toshiba Corp 樹脂封止型半導体装置
IT1239644B (it) * 1990-02-22 1993-11-11 Sgs Thomson Microelectronics Struttura di supporto degli adduttori perfezionata per contenitori di dispositivi integrati di potenza

Also Published As

Publication number Publication date
JP3140550B2 (ja) 2001-03-05
US6320258B1 (en) 2001-11-20
DE69211609T2 (de) 1996-11-21
JPH0661393A (ja) 1994-03-04
ITCT910010A1 (it) 1992-10-26
EP0511702A3 (en) 1993-06-09
EP0511702A2 (de) 1992-11-04
IT1249388B (it) 1995-02-23
ITCT910010A0 (it) 1991-04-26
EP0511702B1 (de) 1996-06-19

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee