DE69209970D1 - Höckerelektrodenstruktur und Halbleiterchip mit dieser Struktur - Google Patents
Höckerelektrodenstruktur und Halbleiterchip mit dieser StrukturInfo
- Publication number
- DE69209970D1 DE69209970D1 DE69209970T DE69209970T DE69209970D1 DE 69209970 D1 DE69209970 D1 DE 69209970D1 DE 69209970 T DE69209970 T DE 69209970T DE 69209970 T DE69209970 T DE 69209970T DE 69209970 D1 DE69209970 D1 DE 69209970D1
- Authority
- DE
- Germany
- Prior art keywords
- semiconductor chip
- bump electrode
- electrode structure
- bump
- chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/03—Manufacturing methods
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
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- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0657—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape of the body
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- H01L2924/10155—Shape being other than a cuboid
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- H01L2924/30—Technical effects
- H01L2924/301—Electrical effects
- H01L2924/30105—Capacitance
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Wire Bonding (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP03283367A JP3077316B2 (ja) | 1991-10-30 | 1991-10-30 | 集積回路装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69209970D1 true DE69209970D1 (de) | 1996-05-23 |
DE69209970T2 DE69209970T2 (de) | 1996-12-12 |
Family
ID=17664582
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69209970T Expired - Fee Related DE69209970T2 (de) | 1991-10-30 | 1992-10-28 | Höckerelektrodenstruktur und Halbleiterchip mit dieser Struktur |
Country Status (4)
Country | Link |
---|---|
US (1) | US5289038A (de) |
EP (1) | EP0540312B1 (de) |
JP (1) | JP3077316B2 (de) |
DE (1) | DE69209970T2 (de) |
Families Citing this family (22)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5719448A (en) * | 1989-03-07 | 1998-02-17 | Seiko Epson Corporation | Bonding pad structures for semiconductor integrated circuits |
JP2792532B2 (ja) | 1994-09-30 | 1998-09-03 | 日本電気株式会社 | 半導体装置の製造方法及び半導体ウエハー |
US5587336A (en) * | 1994-12-09 | 1996-12-24 | Vlsi Technology | Bump formation on yielded semiconductor dies |
JP2830903B2 (ja) * | 1995-07-21 | 1998-12-02 | 日本電気株式会社 | 半導体デバイスの製造方法 |
DE19632626A1 (de) * | 1996-08-13 | 1998-02-19 | Siemens Ag | Verfahren zum Herstellen von Halbleiterkörpern mit MOVPE-Schichtenfolge |
JP3695893B2 (ja) | 1996-12-03 | 2005-09-14 | 沖電気工業株式会社 | 半導体装置とその製造方法および実装方法 |
US5929521A (en) * | 1997-03-26 | 1999-07-27 | Micron Technology, Inc. | Projected contact structure for bumped semiconductor device and resulting articles and assemblies |
US7390732B1 (en) * | 1997-07-15 | 2008-06-24 | Hitachi, Ltd. | Method for producing a semiconductor device with pyramidal bump electrodes bonded onto pad electrodes arranged on a semiconductor chip |
US6031293A (en) * | 1999-04-26 | 2000-02-29 | United Microelectronics Corporation | Package-free bonding pad structure |
US6434817B1 (en) * | 1999-12-03 | 2002-08-20 | Delphi Technologies, Inc. | Method for joining an integrated circuit |
JP3967239B2 (ja) * | 2001-09-20 | 2007-08-29 | 株式会社フジクラ | 充填金属部付き部材の製造方法及び充填金属部付き部材 |
US20050085062A1 (en) * | 2003-10-15 | 2005-04-21 | Semitool, Inc. | Processes and tools for forming lead-free alloy solder precursors |
KR20070045359A (ko) | 2004-08-31 | 2007-05-02 | 코닌클리즈케 필립스 일렉트로닉스 엔.브이. | 적어도 하나의 테스트 컨택트 구조를 포함하는 칩과 이를포함한 웨이퍼 |
KR100630736B1 (ko) * | 2005-01-28 | 2006-10-02 | 삼성전자주식회사 | 반도체 소자의 범프 및 제조 방법 |
JP2006222374A (ja) * | 2005-02-14 | 2006-08-24 | Fuji Film Microdevices Co Ltd | 半導体チップ |
JP2006339342A (ja) * | 2005-06-01 | 2006-12-14 | Shin Etsu Handotai Co Ltd | 太陽電池および太陽電池の製造方法 |
CN101989590B (zh) * | 2009-07-30 | 2012-11-14 | 瀚宇彩晶股份有限公司 | 凸块结构 |
JP5611682B2 (ja) * | 2010-06-21 | 2014-10-22 | 京セラ株式会社 | 弾性波装置 |
FR2969381A1 (fr) * | 2010-12-21 | 2012-06-22 | St Microelectronics Crolles 2 | Puce electronique comportant des piliers de connexion, et procede de fabrication |
FR2978296A1 (fr) * | 2011-07-20 | 2013-01-25 | St Microelectronics Crolles 2 | Puce electronique comportant des piliers de connexion, et procede de fabrication |
US20180082967A1 (en) * | 2016-09-21 | 2018-03-22 | Nanya Technology Corporation | Semiconductor structure and manufacturing method thereof |
DE102016222913A1 (de) * | 2016-11-21 | 2018-05-24 | Robert Bosch Gmbh | Gassensor mit einem Halbleitersubstrat mit mindestens einer Isolationsschicht und einer Leiterbahn |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3577037A (en) * | 1968-07-05 | 1971-05-04 | Ibm | Diffused electrical connector apparatus and method of making same |
US3839727A (en) * | 1973-06-25 | 1974-10-01 | Ibm | Semiconductor chip to substrate solder bond using a locally dispersed, ternary intermetallic compound |
US4074342A (en) * | 1974-12-20 | 1978-02-14 | International Business Machines Corporation | Electrical package for lsi devices and assembly process therefor |
US4163988A (en) * | 1978-01-30 | 1979-08-07 | Xerox Corporation | Split gate V groove FET |
US4514751A (en) * | 1982-12-23 | 1985-04-30 | International Business Machines Corporation | Compressively stresses titanium metallurgy for contacting passivated semiconductor devices |
-
1991
- 1991-10-30 JP JP03283367A patent/JP3077316B2/ja not_active Expired - Fee Related
-
1992
- 1992-10-28 US US07/967,400 patent/US5289038A/en not_active Expired - Lifetime
- 1992-10-28 DE DE69209970T patent/DE69209970T2/de not_active Expired - Fee Related
- 1992-10-28 EP EP92309877A patent/EP0540312B1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
EP0540312B1 (de) | 1996-04-17 |
US5289038A (en) | 1994-02-22 |
JP3077316B2 (ja) | 2000-08-14 |
DE69209970T2 (de) | 1996-12-12 |
EP0540312A1 (de) | 1993-05-05 |
JPH05121409A (ja) | 1993-05-18 |
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