DE69133388D1 - Herstellungsmethode von Halbleiterstrukturen mit Qantumquellenleitungen - Google Patents
Herstellungsmethode von Halbleiterstrukturen mit QantumquellenleitungenInfo
- Publication number
- DE69133388D1 DE69133388D1 DE69133388T DE69133388T DE69133388D1 DE 69133388 D1 DE69133388 D1 DE 69133388D1 DE 69133388 T DE69133388 T DE 69133388T DE 69133388 T DE69133388 T DE 69133388T DE 69133388 D1 DE69133388 D1 DE 69133388D1
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- source lines
- semiconductor structures
- quantum source
- quantum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02387—Group 13/15 materials
- H01L21/02395—Arsenides
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y20/00—Nanooptics, e.g. quantum optics or photonic crystals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/02428—Structure
- H01L21/0243—Surface structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02455—Group 13/15 materials
- H01L21/02463—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02505—Layer structure consisting of more than two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02538—Group 13/15 materials
- H01L21/02546—Arsenides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02587—Structure
- H01L21/0259—Microstructure
- H01L21/02603—Nanowires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
- H01L21/02639—Preparation of substrate for selective deposition
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/26—Bombardment with radiation
- H01L21/263—Bombardment with radiation with high-energy radiation
- H01L21/268—Bombardment with radiation with high-energy radiation using electromagnetic radiation, e.g. laser radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01S—DEVICES USING THE PROCESS OF LIGHT AMPLIFICATION BY STIMULATED EMISSION OF RADIATION [LASER] TO AMPLIFY OR GENERATE LIGHT; DEVICES USING STIMULATED EMISSION OF ELECTROMAGNETIC RADIATION IN WAVE RANGES OTHER THAN OPTICAL
- H01S5/00—Semiconductor lasers
- H01S5/30—Structure or shape of the active region; Materials used for the active region
- H01S5/34—Structure or shape of the active region; Materials used for the active region comprising quantum well or superlattice structures, e.g. single quantum well [SQW] lasers, multiple quantum well [MQW] lasers or graded index separate confinement heterostructure [GRINSCH] lasers
- H01S5/341—Structures having reduced dimensionality, e.g. quantum wires
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/962—Quantum dots and lines
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Nanotechnology (AREA)
- High Energy & Nuclear Physics (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Life Sciences & Earth Sciences (AREA)
- Biophysics (AREA)
- Electromagnetism (AREA)
- Materials Engineering (AREA)
- Health & Medical Sciences (AREA)
- Toxicology (AREA)
- Recrystallisation Techniques (AREA)
- Semiconductor Lasers (AREA)
- Light Receiving Elements (AREA)
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US542857 | 1990-06-25 | ||
US07/542,857 US5362973A (en) | 1990-06-25 | 1990-06-25 | Quantum fabricated via photo induced evaporation enhancement during in situ epitaxial growth |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69133388D1 true DE69133388D1 (de) | 2004-06-24 |
DE69133388T2 DE69133388T2 (de) | 2004-09-16 |
Family
ID=24165575
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69133388T Expired - Lifetime DE69133388T2 (de) | 1990-06-25 | 1991-06-25 | Herstellungsmethode von Halbleiterstrukturen mit Qantumquellenleitungen |
Country Status (5)
Country | Link |
---|---|
US (2) | US5362973A (de) |
EP (1) | EP0469712B1 (de) |
JP (1) | JP3188728B2 (de) |
CA (1) | CA2041942C (de) |
DE (1) | DE69133388T2 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5114877A (en) * | 1991-01-08 | 1992-05-19 | Xerox Corporation | Method of fabricating quantum wire semiconductor laser via photo induced evaporation enhancement during in situ epitaxial growth |
US5694059A (en) * | 1991-12-24 | 1997-12-02 | Hitachi Ltd. | Buffer of fine connection structure for connecting an atom level circuit and a general semiconductor circuit |
JPH06232099A (ja) | 1992-09-10 | 1994-08-19 | Mitsubishi Electric Corp | 半導体装置の製造方法,半導体装置の製造装置,半導体レーザの製造方法,量子細線構造の製造方法,及び結晶成長方法 |
GB2299707B (en) * | 1992-09-10 | 1997-01-22 | Mitsubishi Electric Corp | Method for producing a semiconductor device |
US5962863A (en) * | 1993-09-09 | 1999-10-05 | The United States Of America As Represented By The Secretary Of The Navy | Laterally disposed nanostructures of silicon on an insulating substrate |
US6011271A (en) | 1994-04-28 | 2000-01-04 | Fujitsu Limited | Semiconductor device and method of fabricating the same |
EP0709902B1 (de) * | 1994-10-26 | 2002-01-23 | Mitsubishi Chemical Corporation | Lichtemittierende Halbleiteranordnung und Herstellungsverfahren |
US5889913A (en) * | 1995-03-15 | 1999-03-30 | Kabushiki Kaisha Toshiba | Optical semiconductor device and method of fabricating the same |
DE19522351A1 (de) * | 1995-06-20 | 1997-01-09 | Max Planck Gesellschaft | Verfahren zur Herstellung von Quantenstrukturen, insbesondere von Quantenpunkten und Tunnelbarrieren sowie Bauelemente mit solchen Quantenstrukturen |
JP3320641B2 (ja) * | 1996-09-13 | 2002-09-03 | 株式会社東芝 | メモリセル |
KR100238452B1 (ko) * | 1997-08-05 | 2000-01-15 | 정선종 | 초미세 구조 일괄 성장방법 |
KR100506943B1 (ko) * | 2003-09-09 | 2005-08-05 | 삼성전자주식회사 | 식각정지막으로 연결홀의 저측면에 경사를 갖는 반도체소자의 제조 방법들 |
US8760786B2 (en) | 2012-06-25 | 2014-06-24 | Oracle International Corporation | Lateral tape motion detector |
Family Cites Families (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4509996A (en) * | 1982-11-05 | 1985-04-09 | International Standard Electric Corporation | Injection laser manufacture |
US4888624A (en) * | 1984-06-15 | 1989-12-19 | American Telephone And Telegraph Company, At&T Bell Laboratories | Semiconductor devices employing high resistivity in-based compound group III-IV epitaxial layer for current confinement |
US4581621A (en) * | 1984-07-02 | 1986-04-08 | Texas Instruments Incorporated | Quantum device output switch |
US4733282A (en) * | 1985-08-13 | 1988-03-22 | International Business Machines Corporation | One-dimensional quantum pipeline type carrier path semiconductor devices |
JP2531655B2 (ja) * | 1987-01-16 | 1996-09-04 | 株式会社日立製作所 | 半導体装置 |
JPH0797661B2 (ja) * | 1987-09-29 | 1995-10-18 | 沖電気工業株式会社 | 発光ダイオードおよびその製造方法 |
JPH0231479A (ja) * | 1988-07-21 | 1990-02-01 | Nec Corp | 半導体量子箱構造の製造方法 |
US4962057A (en) * | 1988-10-13 | 1990-10-09 | Xerox Corporation | Method of in situ photo induced evaporation enhancement of compound thin films during or after epitaxial growth |
US5013684A (en) * | 1989-03-24 | 1991-05-07 | Xerox Corporation | Buried disordering sources in semiconductor structures employing photo induced evaporation enhancement during in situ epitaxial growth |
US5114877A (en) * | 1991-01-08 | 1992-05-19 | Xerox Corporation | Method of fabricating quantum wire semiconductor laser via photo induced evaporation enhancement during in situ epitaxial growth |
-
1990
- 1990-06-25 US US07/542,857 patent/US5362973A/en not_active Expired - Lifetime
-
1991
- 1991-05-07 CA CA002041942A patent/CA2041942C/en not_active Expired - Lifetime
- 1991-06-18 JP JP14623691A patent/JP3188728B2/ja not_active Expired - Fee Related
- 1991-06-25 DE DE69133388T patent/DE69133388T2/de not_active Expired - Lifetime
- 1991-06-25 EP EP91305737A patent/EP0469712B1/de not_active Expired - Lifetime
-
1994
- 1994-07-22 US US08/279,143 patent/US5436191A/en not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
JP3188728B2 (ja) | 2001-07-16 |
DE69133388T2 (de) | 2004-09-16 |
CA2041942C (en) | 1996-06-18 |
US5362973A (en) | 1994-11-08 |
CA2041942A1 (en) | 1991-12-26 |
EP0469712B1 (de) | 2004-05-19 |
US5436191A (en) | 1995-07-25 |
EP0469712A1 (de) | 1992-02-05 |
JPH04243124A (ja) | 1992-08-31 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |