DE69119029D1 - Verfahren zum Zusammenbau und zur Harzummantelung eines Leistungshalbleiters, der auf einem Kühlkörper angebracht ist - Google Patents

Verfahren zum Zusammenbau und zur Harzummantelung eines Leistungshalbleiters, der auf einem Kühlkörper angebracht ist

Info

Publication number
DE69119029D1
DE69119029D1 DE69119029T DE69119029T DE69119029D1 DE 69119029 D1 DE69119029 D1 DE 69119029D1 DE 69119029 T DE69119029 T DE 69119029T DE 69119029 T DE69119029 T DE 69119029T DE 69119029 D1 DE69119029 D1 DE 69119029D1
Authority
DE
Germany
Prior art keywords
assembling
heat sink
power semiconductor
resin coating
semiconductor mounted
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69119029T
Other languages
English (en)
Other versions
DE69119029T2 (de
Inventor
Paolo Casati
De Martiis Carlo Cognetti
Giuseppe Marchisi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
STMicroelectronics SRL
Original Assignee
SGS Thomson Microelectronics SRL
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SGS Thomson Microelectronics SRL filed Critical SGS Thomson Microelectronics SRL
Publication of DE69119029D1 publication Critical patent/DE69119029D1/de
Application granted granted Critical
Publication of DE69119029T2 publication Critical patent/DE69119029T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/42—Fillings or auxiliary members in containers or encapsulations selected or arranged to facilitate heating or cooling
    • H01L23/433—Auxiliary members in containers characterised by their shape, e.g. pistons
    • H01L23/4334—Auxiliary members in encapsulations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565—Moulds
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S425/00—Plastic article or earthenware shaping or treating: apparatus
    • Y10S425/228—Injection plunger or ram: transfer molding type
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Injection Moulding Of Plastics Or The Like (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
DE69119029T 1990-10-31 1991-10-30 Verfahren zum Zusammenbau und zur Harzummantelung eines Leistungshalbleiters, der auf einem Kühlkörper angebracht ist Expired - Fee Related DE69119029T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
IT08364390A IT1247649B (it) 1990-10-31 1990-10-31 Procedimento di incapsulamento in resina di un dispositivo a semiconduttore di potenza montato su dissipatore allontanando i reofori dal dissipatore mediante l'azione del controstampo in fase di chiusura dello stampo

Publications (2)

Publication Number Publication Date
DE69119029D1 true DE69119029D1 (de) 1996-05-30
DE69119029T2 DE69119029T2 (de) 1996-08-14

Family

ID=11323577

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69119029T Expired - Fee Related DE69119029T2 (de) 1990-10-31 1991-10-30 Verfahren zum Zusammenbau und zur Harzummantelung eines Leistungshalbleiters, der auf einem Kühlkörper angebracht ist

Country Status (4)

Country Link
US (2) US5244838A (de)
EP (1) EP0484297B1 (de)
DE (1) DE69119029T2 (de)
IT (1) IT1247649B (de)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04291948A (ja) * 1991-03-20 1992-10-16 Fujitsu Ltd 半導体装置及びその製造方法及び放熱フィン
IT1252136B (it) * 1991-11-29 1995-06-05 St Microelectronics Srl Struttura di dispositivo a semiconduttore con dissipatore metallico e corpo in plastica, con mezzi per una connessione elettrica al dissipatore di alta affidabilita'
JP3057130B2 (ja) * 1993-02-18 2000-06-26 三菱電機株式会社 樹脂封止型半導体パッケージおよびその製造方法
DE69519259T2 (de) * 1994-01-13 2001-05-17 Citizen Watch Co Ltd Verfahren zum harzversiegeln von halbleiterbauteilen
US6466446B1 (en) 1994-07-01 2002-10-15 Saint Gobain/Norton Industrial Ceramics Corporation Integrated circuit package with diamond heat sink
US5609889A (en) * 1995-05-26 1997-03-11 Hestia Technologies, Inc. Apparatus for encapsulating electronic packages
US5652463A (en) * 1995-05-26 1997-07-29 Hestia Technologies, Inc. Transfer modlded electronic package having a passage means
US5817545A (en) * 1996-01-24 1998-10-06 Cornell Research Foundation, Inc. Pressurized underfill encapsulation of integrated circuits
US5846469A (en) * 1996-05-30 1998-12-08 Pacesetter, Inc. Method for manufacturing a defibrillation electrode
US6534337B1 (en) * 1997-05-15 2003-03-18 Texas Instruments Incorporated Lead frame type plastic ball grid array package with pre-assembled ball type contacts
JPH11145364A (ja) * 1997-11-12 1999-05-28 Denso Corp 樹脂封止型半導体装置及びその製造方法
JP3087709B2 (ja) * 1997-12-08 2000-09-11 日本電気株式会社 半導体装置およびその製造方法
US6201695B1 (en) * 1998-10-26 2001-03-13 Micron Technology, Inc. Heat sink for chip stacking applications
KR100522040B1 (ko) * 2003-08-29 2005-10-17 한국기계연구원 압착성형장치의 편심보정용 자가정렬 스테이지
US7271513B2 (en) * 2005-04-15 2007-09-18 Seagate Technology Llc Thermal stress relieved overmolded mounting base
US7560309B1 (en) * 2005-07-26 2009-07-14 Marvell International Ltd. Drop-in heat sink and exposed die-back for molded flip die package
US7468886B2 (en) * 2007-03-05 2008-12-23 International Business Machines Corporation Method and structure to improve thermal dissipation from semiconductor devices
CN105705336B (zh) * 2013-10-28 2018-04-24 惠普发展公司，有限责任合伙企业 以低轮廓封装体封装键合线的方法
CN117012656B (zh) * 2023-09-20 2023-12-05 广东气派科技有限公司 高密度大矩阵sot89封装结构的制备方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3930114A (en) * 1975-03-17 1975-12-30 Nat Semiconductor Corp Integrated circuit package utilizing novel heat sink structure
US4215360A (en) * 1978-11-09 1980-07-29 General Motors Corporation Power semiconductor device assembly having a lead frame with interlock members
US4451973A (en) * 1981-04-28 1984-06-05 Matsushita Electronics Corporation Method for manufacturing a plastic encapsulated semiconductor device and a lead frame therefor
US4470786A (en) * 1981-07-28 1984-09-11 Omron Tateisi Electronics Co. Molding apparatus with retractable preform support pins
US4377548A (en) * 1981-11-27 1983-03-22 Sprague Electric Company Method for encapsulating a radial leaded electrical component
JPS6010632A (ja) * 1983-06-29 1985-01-19 Nec Home Electronics Ltd 半導体装置の製造方法
JPS6188535A (ja) * 1984-10-08 1986-05-06 Nec Corp 半導体装置の製造方法
US4890152A (en) * 1986-02-14 1989-12-26 Matsushita Electric Works, Ltd. Plastic molded chip carrier package and method of fabricating the same
JPH0640557B2 (ja) * 1987-10-06 1994-05-25 サンケン電気株式会社 樹脂封止型半導体装置の製造方法
JPH01179332A (ja) * 1987-12-31 1989-07-17 Sanken Electric Co Ltd 樹脂封止型電子装置の製造方法
JPH01248630A (ja) * 1988-03-30 1989-10-04 Nec Corp 樹脂封止用キャリアボード
JPH0738499B2 (ja) * 1988-06-17 1995-04-26 松下電器産業株式会社 プリント基板の防水処理方法
JP2752677B2 (ja) * 1989-01-11 1998-05-18 日本電気株式会社 半導体装置の製造方法
JPH02306639A (ja) * 1989-05-22 1990-12-20 Toshiba Corp 半導体装置の樹脂封入方法
US5044912A (en) * 1989-12-11 1991-09-03 Motorola, Inc. Mold assembly having positioning means
US5105259A (en) * 1990-09-28 1992-04-14 Motorola, Inc. Thermally enhanced semiconductor device utilizing a vacuum to ultimately enhance thermal dissipation

Also Published As

Publication number Publication date
US5370517A (en) 1994-12-06
IT9083643A1 (it) 1992-05-01
US5244838A (en) 1993-09-14
EP0484297A3 (en) 1993-03-24
DE69119029T2 (de) 1996-08-14
EP0484297B1 (de) 1996-04-24
EP0484297A2 (de) 1992-05-06
IT1247649B (it) 1994-12-28
IT9083643A0 (it) 1990-10-31

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee