DE69111283T2 - Mikroprozessor mit niedrigem Leistungsverbrauch. - Google Patents

Mikroprozessor mit niedrigem Leistungsverbrauch.

Info

Publication number
DE69111283T2
DE69111283T2 DE69111283T DE69111283T DE69111283T2 DE 69111283 T2 DE69111283 T2 DE 69111283T2 DE 69111283 T DE69111283 T DE 69111283T DE 69111283 T DE69111283 T DE 69111283T DE 69111283 T2 DE69111283 T2 DE 69111283T2
Authority
DE
Germany
Prior art keywords
power consumption
low power
consumption microprocessor
microprocessor
low
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69111283T
Other languages
English (en)
Other versions
DE69111283D1 (de
Inventor
Toshimichi Matsuzaki
Masashi Deguchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Publication of DE69111283D1 publication Critical patent/DE69111283D1/de
Application granted granted Critical
Publication of DE69111283T2 publication Critical patent/DE69111283T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/22—Microcontrol or microprogram arrangements
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/324—Power saving characterised by the action undertaken by lowering clock frequency
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline, look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline, look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
DE69111283T 1990-03-30 1991-03-30 Mikroprozessor mit niedrigem Leistungsverbrauch. Expired - Fee Related DE69111283T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2086507A JP2762670B2 (ja) 1990-03-30 1990-03-30 データ処理装置

Publications (2)

Publication Number Publication Date
DE69111283D1 DE69111283D1 (de) 1995-08-24
DE69111283T2 true DE69111283T2 (de) 1996-04-04

Family

ID=13888896

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69111283T Expired - Fee Related DE69111283T2 (de) 1990-03-30 1991-03-30 Mikroprozessor mit niedrigem Leistungsverbrauch.

Country Status (5)

Country Link
US (1) US5418969A (de)
EP (1) EP0451661B1 (de)
JP (1) JP2762670B2 (de)
KR (1) KR940009376B1 (de)
DE (1) DE69111283T2 (de)

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US5581297A (en) * 1992-07-24 1996-12-03 Intelligent Instruments Corporation Low power video security monitoring system
US5473767A (en) * 1992-11-03 1995-12-05 Intel Corporation Method and apparatus for asynchronously stopping the clock in a processor
US5392437A (en) * 1992-11-06 1995-02-21 Intel Corporation Method and apparatus for independently stopping and restarting functional units
US5586332A (en) * 1993-03-24 1996-12-17 Intel Corporation Power management for low power processors through the use of auto clock-throttling
JPH06318123A (ja) * 1993-05-07 1994-11-15 Nec Ic Microcomput Syst Ltd 半導体集積回路
US5337285A (en) * 1993-05-21 1994-08-09 Rambus, Inc. Method and apparatus for power control in devices
DE4447848B4 (de) * 1993-06-30 2005-10-27 Intel Corporation, Santa Clara Taktverteilungssystem für einen Mikroprozessor
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DE69522595T2 (de) * 1994-02-04 2002-07-11 Intel Corp Verfahren und Vorrichtung zur Stromverbrauchssteuerung in einem Rechnersystem
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JP3505018B2 (ja) * 1994-11-22 2004-03-08 株式会社ルネサステクノロジ 半導体集積回路
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DE19505990C2 (de) * 1995-02-21 2002-03-28 United Microelectronics Corp Verfahren und Vorrichtung zum Verringern des Energieverbrauchs eines Computers während der Dateneingabe
JPH08272479A (ja) * 1995-03-31 1996-10-18 Nkk Corp 可変クロック発生装置
US5680594A (en) * 1995-05-24 1997-10-21 Eastman Kodak Company Asic bus interface having a master state machine and a plurality of synchronizing state machines for controlling subsystems operating at different clock frequencies
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JP3520611B2 (ja) * 1995-07-06 2004-04-19 株式会社日立製作所 プロセッサの制御方法
US5983339A (en) * 1995-08-21 1999-11-09 International Business Machines Corporation Power down system and method for pipelined logic functions
US5822596A (en) * 1995-11-06 1998-10-13 International Business Machines Corporation Controlling power up using clock gating
US5726921A (en) * 1995-12-22 1998-03-10 Intel Corporation Floating point power conservation
US5758133A (en) * 1995-12-28 1998-05-26 Vlsi Technology, Inc. System and method for altering bus speed based on bus utilization
US5802132A (en) 1995-12-29 1998-09-01 Intel Corporation Apparatus for generating bus clock signals with a 1/N characteristic in a 2/N mode clocking scheme
US5692202A (en) * 1995-12-29 1997-11-25 Intel Corporation System, apparatus, and method for managing power in a computer system
US5834956A (en) 1995-12-29 1998-11-10 Intel Corporation Core clock correction in a 2/N mode clocking scheme
US5754867A (en) * 1996-03-20 1998-05-19 Vlsi Technology, Inc. Method for optimizing performance versus power consumption using external/internal clock frequency ratios
US6000036A (en) * 1996-07-17 1999-12-07 International Business Machines Corp. Logical steering to avoid hot spots on integrated circuits
US6785826B1 (en) * 1996-07-17 2004-08-31 International Business Machines Corporation Self power audit and control circuitry for microprocessor functional units
US5742781A (en) * 1996-08-09 1998-04-21 Hitachi America, Ltd. Decoded instruction buffer apparatus and method for reducing power consumption in a digital signal processor
US5826067A (en) * 1996-09-06 1998-10-20 Intel Corporation Method and apparatus for preventing logic glitches in a 2/n clocking scheme
US5862373A (en) * 1996-09-06 1999-01-19 Intel Corporation Pad cells for a 2/N mode clocking scheme
JP2923882B2 (ja) 1997-03-31 1999-07-26 日本電気株式会社 クロック供給回路を備える半導体集積回路
JP2993466B2 (ja) * 1997-06-09 1999-12-20 日本電気株式会社 情報処理装置
US6188830B1 (en) 1997-07-14 2001-02-13 Sony Corporation Audiovisual effects processing method and apparatus for instantaneous storage-based playback of audio data in synchronization with video data
JPH11161383A (ja) * 1997-09-05 1999-06-18 Texas Instr Inc <Ti> オンチップ・アクティビティに応答してマイクロプロセッサの電力消費を調節するためのマイクロプロセッサ回路、システム、及び方法
US6345363B1 (en) 1998-06-23 2002-02-05 National Semiconductor Corporation Microprocessor core power reduction by not reloading existing operands
US6378081B1 (en) * 1998-10-01 2002-04-23 Gateway, Inc. Power conservation without performance reduction in a power-managed system
US6564329B1 (en) * 1999-03-16 2003-05-13 Linkup Systems Corporation System and method for dynamic clock generation
EP1117031B1 (de) * 2000-01-14 2007-07-11 Texas Instruments France Mikroprozessor mit ermässigtem Stromverbrauch
US6895520B1 (en) 2001-03-02 2005-05-17 Advanced Micro Devices, Inc. Performance and power optimization via block oriented performance measurement and control
JP2003099148A (ja) * 2001-09-19 2003-04-04 Sanyo Electric Co Ltd データ処理装置とこれに利用可能なシステム制御装置およびデータ変換方法
US8645954B2 (en) * 2001-12-13 2014-02-04 Intel Corporation Computing system capable of reducing power consumption by distributing execution of instruction across multiple processors and method therefore
JP2003186567A (ja) * 2001-12-19 2003-07-04 Matsushita Electric Ind Co Ltd マイクロプロセッサ
US7191350B2 (en) * 2002-01-30 2007-03-13 Matsushita Electric Industrial Co., Ltd. Instruction conversion apparatus and instruction conversion method providing power control information, program and circuit for implementing the instruction conversion, and microprocessor for executing the converted instruction
DE10221529A1 (de) 2002-05-14 2003-12-04 Systemonic Ag Verfahren zum gesteuerten Abschalten von Datenverarbeitungseinheiten
US7076681B2 (en) * 2002-07-02 2006-07-11 International Business Machines Corporation Processor with demand-driven clock throttling power reduction
CN100399262C (zh) * 2003-08-26 2008-07-02 国际商业机器公司 用于降低功率的按需驱动时钟调节的处理器
US7206950B2 (en) 2004-06-16 2007-04-17 Matsushita Electric Industrial Co., Ltd. Processor system, instruction sequence optimization device, and instruction sequence optimization program
US8656143B2 (en) 2006-03-13 2014-02-18 Laurence H. Cooke Variable clocked heterogeneous serial array processor
US8125243B1 (en) 2007-03-12 2012-02-28 Cypress Semiconductor Corporation Integrity checking of configurable data of programmable device
US8060661B1 (en) 2007-03-27 2011-11-15 Cypress Semiconductor Corporation Interface circuit and method for programming or communicating with an integrated circuit via a power supply pin
WO2009057008A1 (en) * 2007-10-30 2009-05-07 Nxp B.V. Method and system for clock control for power-state transistions
US8336762B1 (en) 2008-11-17 2012-12-25 Greenwise Bankcard LLC Payment transaction processing
US9104435B2 (en) 2009-04-14 2015-08-11 Empire Technology Development Llc Program and data annotation for hardware customization and energy optimization
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JP5561418B1 (ja) * 2013-08-09 2014-07-30 富士ゼロックス株式会社 画像処理装置及びプログラム

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Also Published As

Publication number Publication date
JPH03286213A (ja) 1991-12-17
DE69111283D1 (de) 1995-08-24
EP0451661A2 (de) 1991-10-16
EP0451661A3 (en) 1993-01-20
JP2762670B2 (ja) 1998-06-04
US5418969A (en) 1995-05-23
EP0451661B1 (de) 1995-07-19
KR910017279A (ko) 1991-11-05
KR940009376B1 (ko) 1994-10-07

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee