DE69107847D1 - Sog mit einer feuchtigkeitsundurchlässigen deckenden schutzschicht. - Google Patents
Sog mit einer feuchtigkeitsundurchlässigen deckenden schutzschicht.Info
- Publication number
- DE69107847D1 DE69107847D1 DE69107847T DE69107847T DE69107847D1 DE 69107847 D1 DE69107847 D1 DE 69107847D1 DE 69107847 T DE69107847 T DE 69107847T DE 69107847 T DE69107847 T DE 69107847T DE 69107847 D1 DE69107847 D1 DE 69107847D1
- Authority
- DE
- Germany
- Prior art keywords
- moisture
- suction
- protective cover
- protective
- cover
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
- H01L21/02129—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02203—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02225—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
- H01L21/0226—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
- H01L21/02282—Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02337—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment treatment by exposure to a gas or vapour
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02296—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
- H01L21/02318—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment
- H01L21/02362—Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer post-treatment formation of intermediate layers, e.g. capping layers or diffusion barriers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31051—Planarisation of the insulating layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/31058—After-treatment of organic layers
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/314—Inorganic layers
- H01L21/316—Inorganic layers composed of oxides or glassy oxides or oxide based glass
- H01L21/31695—Deposition of porous oxides or porous glassy oxides or oxide based porous glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
- H01L23/291—Oxides or nitrides or carbides, e.g. ceramics, glass
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
- H01L23/3171—Partial encapsulation or coating the coating being directly applied to the semiconductor body, e.g. passivation layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02107—Forming insulating materials on a substrate
- H01L21/02109—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
- H01L21/02112—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
- H01L21/02123—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
- H01L21/02126—Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/902—Capping layer
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Formation Of Insulating Films (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
CA002017720A CA2017720C (en) | 1990-05-29 | 1990-05-29 | Sog with moisture-resistant protective capping layer |
PCT/CA1991/000177 WO1991019317A1 (en) | 1990-05-29 | 1991-05-28 | Sog with moisture resistant protective capping layer |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69107847D1 true DE69107847D1 (de) | 1995-04-06 |
DE69107847T2 DE69107847T2 (de) | 1995-10-26 |
Family
ID=4145086
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69107847T Expired - Lifetime DE69107847T2 (de) | 1990-05-29 | 1991-05-28 | Sog mit einer feuchtigkeitsundurchlässigen deckenden schutzschicht. |
Country Status (7)
Country | Link |
---|---|
US (1) | US5364818A (de) |
EP (1) | EP0532543B1 (de) |
JP (1) | JP3249513B2 (de) |
KR (1) | KR100200167B1 (de) |
CA (1) | CA2017720C (de) |
DE (1) | DE69107847T2 (de) |
WO (1) | WO1991019317A1 (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2017719C (en) * | 1990-05-29 | 1999-01-19 | Zarlink Semiconductor Inc. | Moisture-free sog process |
US5376590A (en) * | 1992-01-20 | 1994-12-27 | Nippon Telegraph And Telephone Corporation | Semiconductor device and method of fabricating the same |
US5576247A (en) * | 1992-07-31 | 1996-11-19 | Matsushita Electric Industrial Co., Ltd. | Thin layer forming method wherein hydrophobic molecular layers preventing a BPSG layer from absorbing moisture |
DE69331362T2 (de) * | 1992-08-21 | 2002-06-20 | Stmicroelectronics, Inc. | Planarisierungsverfahren |
JP3158749B2 (ja) * | 1992-12-16 | 2001-04-23 | ヤマハ株式会社 | 半導体装置 |
JPH07169833A (ja) * | 1993-12-14 | 1995-07-04 | Nec Corp | 半導体装置及びその製造方法 |
JPH07211605A (ja) * | 1994-01-14 | 1995-08-11 | Hitachi Ltd | 処理装置および処理方法 |
US6591634B1 (en) * | 1994-02-25 | 2003-07-15 | Toshinori Morizane | Method for production of metal oxide glass film at a low temperature |
CN1118520A (zh) * | 1994-04-15 | 1996-03-13 | 松下电器产业株式会社 | 多层金属布线的形成方法 |
US5461003A (en) * | 1994-05-27 | 1995-10-24 | Texas Instruments Incorporated | Multilevel interconnect structure with air gaps formed between metal leads |
US5472913A (en) * | 1994-08-05 | 1995-12-05 | Texas Instruments Incorporated | Method of fabricating porous dielectric material with a passivation layer for electronics applications |
US5554567A (en) * | 1994-09-01 | 1996-09-10 | Taiwan Semiconductor Manufacturing Company Ltd. | Method for improving adhesion to a spin-on-glass |
US5413940A (en) * | 1994-10-11 | 1995-05-09 | Taiwan Semiconductor Manufacturing Company | Process of treating SOG layer using end-point detector for outgassing |
US6652922B1 (en) * | 1995-06-15 | 2003-11-25 | Alliedsignal Inc. | Electron-beam processed films for microelectronics structures |
KR100208442B1 (ko) * | 1995-06-24 | 1999-07-15 | 김영환 | 반도체 소자의 비아홀 형성방법 |
US5861673A (en) * | 1995-11-16 | 1999-01-19 | Taiwan Semiconductor Manufacturing Company | Method for forming vias in multi-level integrated circuits, for use with multi-level metallizations |
US5849640A (en) * | 1996-04-01 | 1998-12-15 | Vanguard International Semiconductor Corporation | In-situ SOG etchback and deposition for IMD process |
US6114186A (en) * | 1996-07-30 | 2000-09-05 | Texas Instruments Incorporated | Hydrogen silsesquioxane thin films for low capacitance structures in integrated circuits |
US5854503A (en) * | 1996-11-19 | 1998-12-29 | Integrated Device Technology, Inc. | Maximization of low dielectric constant material between interconnect traces of a semiconductor circuit |
US5691247A (en) * | 1996-12-19 | 1997-11-25 | Tower Semiconductor Ltd. | Method for depositing a flow fill layer on an integrated circuit wafer |
GB2322734A (en) * | 1997-02-27 | 1998-09-02 | Nec Corp | Semiconductor device and a method of manufacturing the same |
JPH1140558A (ja) * | 1997-07-22 | 1999-02-12 | Sony Corp | 誘電体膜の製造方法 |
EP0948035A1 (de) * | 1998-03-19 | 1999-10-06 | Applied Materials, Inc. | Verfahren zum Anbringen einer dielektrischen Deckschicht über einem dielektrischen Stapel |
JP3189781B2 (ja) * | 1998-04-08 | 2001-07-16 | 日本電気株式会社 | 半導体装置の製造方法 |
JP3329290B2 (ja) * | 1998-11-27 | 2002-09-30 | 日本電気株式会社 | 半導体装置の製造方法 |
US6369453B1 (en) * | 2000-08-11 | 2002-04-09 | Advanced Micro Devices, Inc. | Semiconductor wafer for measurement and recordation of impurities in semiconductor insulators |
US6500770B1 (en) * | 2002-04-22 | 2002-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd | Method for forming a multi-layer protective coating over porous low-k material |
US6896821B2 (en) * | 2002-08-23 | 2005-05-24 | Dalsa Semiconductor Inc. | Fabrication of MEMS devices with spin-on glass |
US7744802B2 (en) * | 2004-06-25 | 2010-06-29 | Intel Corporation | Dielectric film with low coefficient of thermal expansion (CTE) using liquid crystalline resin |
KR101432606B1 (ko) | 2011-07-15 | 2014-08-21 | 제일모직주식회사 | 갭필용 충전제, 이의 제조 방법 및 이를 사용한 반도체 캐패시터의 제조 방법 |
FI130166B (en) * | 2019-03-08 | 2023-03-23 | Picosun Oy | Solder mask |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61180458A (ja) * | 1985-02-05 | 1986-08-13 | Nec Corp | 半導体装置の製造方法 |
JPH06101467B2 (ja) * | 1986-12-18 | 1994-12-12 | 松下電子工業株式会社 | 半導体集積回路装置 |
JPS6464340A (en) * | 1987-09-04 | 1989-03-10 | Hitachi Ltd | Semiconductor device and its manufacture |
JPH02152258A (ja) * | 1988-12-05 | 1990-06-12 | Kawasaki Steel Corp | Lsi用中間酸化膜の製造方法 |
CA2006174A1 (en) * | 1989-12-20 | 1991-06-20 | Luc Ouellet | Method of making crack-free insulating films with sog interlayer |
JPH04199625A (ja) * | 1990-11-29 | 1992-07-20 | Seiko Epson Corp | 半導体装置 |
US5252515A (en) * | 1991-08-12 | 1993-10-12 | Taiwan Semiconductor Manufacturing Company | Method for field inversion free multiple layer metallurgy VLSI processing |
-
1990
- 1990-05-29 CA CA002017720A patent/CA2017720C/en not_active Expired - Fee Related
-
1991
- 1991-05-28 EP EP91909904A patent/EP0532543B1/de not_active Expired - Lifetime
- 1991-05-28 JP JP50968791A patent/JP3249513B2/ja not_active Expired - Lifetime
- 1991-05-28 US US07/962,214 patent/US5364818A/en not_active Expired - Lifetime
- 1991-05-28 DE DE69107847T patent/DE69107847T2/de not_active Expired - Lifetime
- 1991-05-28 WO PCT/CA1991/000177 patent/WO1991019317A1/en active IP Right Grant
-
1992
- 1992-11-30 KR KR1019920703066A patent/KR100200167B1/ko not_active IP Right Cessation
Also Published As
Publication number | Publication date |
---|---|
EP0532543A1 (de) | 1993-03-24 |
US5364818A (en) | 1994-11-15 |
CA2017720A1 (en) | 1991-11-29 |
EP0532543B1 (de) | 1995-03-01 |
CA2017720C (en) | 1999-01-19 |
JP3249513B2 (ja) | 2002-01-21 |
DE69107847T2 (de) | 1995-10-26 |
WO1991019317A1 (en) | 1991-12-12 |
JPH05508741A (ja) | 1993-12-02 |
KR100200167B1 (ko) | 1999-06-15 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: ZARLINK SEMICONDUCTOR INC., KANATA, ONTARIO, CA |
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8327 | Change in the person/name/address of the patent owner |
Owner name: DALSA SEMICONDUCTOR INC., WATERLOO, ONTARIO, CA |
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8328 | Change in the person/name/address of the agent |
Representative=s name: VONNEMANN, KLOIBER & KOLLEGEN, 80796 MUENCHEN |