DE69030415T2 - Verfahren zur Herstellung eines DMOS Transistors - Google Patents
Verfahren zur Herstellung eines DMOS TransistorsInfo
- Publication number
- DE69030415T2 DE69030415T2 DE69030415T DE69030415T DE69030415T2 DE 69030415 T2 DE69030415 T2 DE 69030415T2 DE 69030415 T DE69030415 T DE 69030415T DE 69030415 T DE69030415 T DE 69030415T DE 69030415 T2 DE69030415 T2 DE 69030415T2
- Authority
- DE
- Germany
- Prior art keywords
- manufacturing
- dmos transistor
- dmos
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
- H01L29/66719—With a step of forming an insulating sidewall spacer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66674—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/66712—Vertical DMOS transistors, i.e. VDMOS transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/7801—DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
- H01L29/7802—Vertical DMOS transistors, i.e. VDMOS transistors
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/126—Power FETs
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S148/00—Metal treatment
- Y10S148/131—Reactive ion etching rie
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US07/420,971 US4931408A (en) | 1989-10-13 | 1989-10-13 | Method of fabricating a short-channel low voltage DMOS transistor |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69030415D1 DE69030415D1 (de) | 1997-05-15 |
DE69030415T2 true DE69030415T2 (de) | 1997-07-17 |
Family
ID=23668642
Family Applications (2)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE199090311171T Pending DE422940T1 (de) | 1989-10-13 | 1990-10-11 | Verfahren zur herstellung eines dmos transistors. |
DE69030415T Expired - Fee Related DE69030415T2 (de) | 1989-10-13 | 1990-10-11 | Verfahren zur Herstellung eines DMOS Transistors |
Family Applications Before (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE199090311171T Pending DE422940T1 (de) | 1989-10-13 | 1990-10-11 | Verfahren zur herstellung eines dmos transistors. |
Country Status (4)
Country | Link |
---|---|
US (1) | US4931408A (de) |
EP (1) | EP0422940B1 (de) |
JP (1) | JPH03145138A (de) |
DE (2) | DE422940T1 (de) |
Families Citing this family (34)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5118638A (en) * | 1988-03-18 | 1992-06-02 | Fuji Electric Co., Ltd. | Method for manufacturing MOS type semiconductor devices |
US5331192A (en) * | 1989-06-15 | 1994-07-19 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device |
US5536957A (en) * | 1990-01-16 | 1996-07-16 | Mitsubishi Denki Kabushiki Kaisha | MOS field effect transistor having source/drain regions surrounded by impurity wells |
US5679968A (en) * | 1990-01-31 | 1997-10-21 | Texas Instruments Incorporated | Transistor having reduced hot carrier implantation |
NL9000972A (nl) * | 1990-04-24 | 1991-11-18 | Philips Nv | Werkwijze voor het vervaardigen van een silicium lichaam met een n-type toplaag en een daaraan grenzende, hoger gedoteerde n-type basislaag. |
US5202276A (en) * | 1990-08-20 | 1993-04-13 | Texas Instruments Incorporated | Method of forming a low on-resistance DMOS vertical transistor structure |
US5045966A (en) * | 1990-09-17 | 1991-09-03 | Micrel Semiconductor | Method for forming capacitor using FET process and structure formed by same |
KR940006702B1 (ko) * | 1991-06-14 | 1994-07-25 | 금성일렉트론 주식회사 | 모스패트의 제조방법 |
US5182619A (en) * | 1991-09-03 | 1993-01-26 | Motorola, Inc. | Semiconductor device having an MOS transistor with overlapped and elevated source and drain |
US5200352A (en) * | 1991-11-25 | 1993-04-06 | Motorola Inc. | Transistor having a lightly doped region and method of formation |
IT1250233B (it) * | 1991-11-29 | 1995-04-03 | St Microelectronics Srl | Procedimento per la fabbricazione di circuiti integrati in tecnologia mos. |
US5248627A (en) * | 1992-03-20 | 1993-09-28 | Siliconix Incorporated | Threshold adjustment in fabricating vertical dmos devices |
US5352914A (en) * | 1992-08-03 | 1994-10-04 | Hughes Aircraft Company | Field-effect transistor with structure for suppressing hot-electron effects, and method of fabricating the transistor |
US5506421A (en) * | 1992-11-24 | 1996-04-09 | Cree Research, Inc. | Power MOSFET in silicon carbide |
US5409848A (en) * | 1994-03-31 | 1995-04-25 | Vlsi Technology, Inc. | Angled lateral pocket implants on p-type semiconductor devices |
EP0689239B1 (de) * | 1994-06-23 | 2007-03-07 | STMicroelectronics S.r.l. | Verfahren zur Herstellung von Leistungsbauteilen in MOS-Technologie |
EP0696054B1 (de) * | 1994-07-04 | 2002-02-20 | STMicroelectronics S.r.l. | Verfahren zur Herstellung von Leistungsbauteilen hoher Dichte in MOS-Technologie |
US5798554A (en) * | 1995-02-24 | 1998-08-25 | Consorzio Per La Ricerca Sulla Microelettronica Nel Mezzogiorno | MOS-technology power device integrated structure and manufacturing process thereof |
US5689128A (en) * | 1995-08-21 | 1997-11-18 | Siliconix Incorporated | High density trenched DMOS transistor |
DE69534919T2 (de) | 1995-10-30 | 2007-01-25 | Stmicroelectronics S.R.L., Agrate Brianza | Leistungsvorrichtung in MOS-Technologie mit einer einzigen kritischen Größe |
EP0772241B1 (de) * | 1995-10-30 | 2004-06-09 | STMicroelectronics S.r.l. | Leistungsbauteil hoher Dichte in MOS-Technologie |
US6228719B1 (en) | 1995-11-06 | 2001-05-08 | Stmicroelectronics S.R.L. | MOS technology power device with low output resistance and low capacitance, and related manufacturing process |
EP0782201B1 (de) * | 1995-12-28 | 2000-08-30 | STMicroelectronics S.r.l. | MOS-Technologie-Leistungsanordnung in integrierter Struktur |
US5821583A (en) * | 1996-03-06 | 1998-10-13 | Siliconix Incorporated | Trenched DMOS transistor with lightly doped tub |
JPH1154746A (ja) * | 1997-07-31 | 1999-02-26 | Toyota Motor Corp | 絶縁ゲート型半導体装置およびその製造方法 |
EP0961325B1 (de) | 1998-05-26 | 2008-05-07 | STMicroelectronics S.r.l. | MOS-Technologie-Leistungsanordnung mit hoher Integrationsdichte |
US7006077B1 (en) * | 1999-11-30 | 2006-02-28 | Nokia Mobile Phones, Ltd. | Electronic device having touch sensitive slide |
US6835627B1 (en) * | 2000-01-10 | 2004-12-28 | Analog Devices, Inc. | Method for forming a DMOS device and a DMOS device |
DE10104274C5 (de) * | 2000-02-04 | 2008-05-29 | International Rectifier Corp., El Segundo | Halbleiterbauteil mit MOS-Gatesteuerung und mit einer Kontaktstruktur sowie Verfahren zu seiner Herstellung |
ATE514192T1 (de) * | 2000-03-31 | 2011-07-15 | Ihp Gmbh | Cmos-kompatibler lateraler dmos-transistor |
JP2011228611A (ja) * | 2010-03-30 | 2011-11-10 | Renesas Electronics Corp | 半導体装置およびその製造方法、ならびに電源装置 |
CN103745930B (zh) * | 2013-12-24 | 2016-08-17 | 北京时代民芯科技有限公司 | 一种节省中低电压的vdmosfet芯片面积的方法 |
US11728422B2 (en) * | 2019-11-14 | 2023-08-15 | Stmicroelectronics S.R.L. | Power MOSFET device having improved safe-operating area and on resistance, manufacturing process thereof and operating method thereof |
IT202000015076A1 (it) | 2020-06-23 | 2021-12-23 | St Microelectronics Srl | Dispositivo elettronico in 4h-sic con prestazioni di corto circuito migliorate, e relativo metodo di fabbricazione |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4344081A (en) * | 1980-04-14 | 1982-08-10 | Supertex, Inc. | Combined DMOS and a vertical bipolar transistor device and fabrication method therefor |
US4503598A (en) * | 1982-05-20 | 1985-03-12 | Fairchild Camera & Instrument Corporation | Method of fabricating power MOSFET structure utilizing self-aligned diffusion and etching techniques |
US4443931A (en) * | 1982-06-28 | 1984-04-24 | General Electric Company | Method of fabricating a semiconductor device with a base region having a deep portion |
JPS5974674A (ja) * | 1982-10-22 | 1984-04-27 | Hitachi Ltd | 絶縁ゲ−ト半導体装置とその製造法 |
EP0229362B1 (de) * | 1986-01-10 | 1993-03-17 | General Electric Company | Halbleitervorrichtung und Methode zur Herstellung |
IT1204243B (it) * | 1986-03-06 | 1989-03-01 | Sgs Microelettronica Spa | Procedimento autoallineato per la fabbricazione di celle dmos di piccole dimensioni e dispositivi mos ottenuti mediante detto procedimento |
JPS63244777A (ja) * | 1987-03-31 | 1988-10-12 | Toshiba Corp | Mos型電界効果トランジスタ |
-
1989
- 1989-10-13 US US07/420,971 patent/US4931408A/en not_active Expired - Lifetime
-
1990
- 1990-10-11 DE DE199090311171T patent/DE422940T1/de active Pending
- 1990-10-11 EP EP90311171A patent/EP0422940B1/de not_active Expired - Lifetime
- 1990-10-11 DE DE69030415T patent/DE69030415T2/de not_active Expired - Fee Related
- 1990-10-12 JP JP2275073A patent/JPH03145138A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
EP0422940B1 (de) | 1997-04-09 |
DE69030415D1 (de) | 1997-05-15 |
DE422940T1 (de) | 1991-11-07 |
EP0422940A3 (en) | 1991-10-16 |
EP0422940A2 (de) | 1991-04-17 |
US4931408A (en) | 1990-06-05 |
JPH03145138A (ja) | 1991-06-20 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8339 | Ceased/non-payment of the annual fee |