DE69021996D1 - Bitfehlerkorrekturschaltung für einen nichtflüchtigen Speicher. - Google Patents

Bitfehlerkorrekturschaltung für einen nichtflüchtigen Speicher.

Info

Publication number
DE69021996D1
DE69021996D1 DE69021996T DE69021996T DE69021996D1 DE 69021996 D1 DE69021996 D1 DE 69021996D1 DE 69021996 T DE69021996 T DE 69021996T DE 69021996 T DE69021996 T DE 69021996T DE 69021996 D1 DE69021996 D1 DE 69021996D1
Authority
DE
Germany
Prior art keywords
holding
error
circuit
data
nonvolatile memory
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69021996T
Other languages
English (en)
Other versions
DE69021996T2 (de
Inventor
Koji Tanagawa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Application granted granted Critical
Publication of DE69021996D1 publication Critical patent/DE69021996D1/de
Publication of DE69021996T2 publication Critical patent/DE69021996T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1076—Parity data used in redundant arrays of independent storages, e.g. in RAID systems
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14—Error detection or correction of the data by redundancy in operation
    • G06F11/1402—Saving, restoring, recovering or retrying
    • G06F11/1405—Saving, restoring, recovering or retrying at machine instruction level
    • G06F11/141—Saving, restoring, recovering or retrying at machine instruction level for bus or memory accesses
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2201/00—Indexing scheme relating to error detection, to error correction, and to monitoring
    • G06F2201/81—Threshold

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Read Only Memory (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Detection And Correction Of Errors (AREA)
  • Retry When Errors Occur (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE69021996T 1989-11-16 1990-11-14 Bitfehlerkorrekturschaltung für einen nichtflüchtigen Speicher. Expired - Fee Related DE69021996T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1298654A JP2835107B2 (ja) 1989-11-16 1989-11-16 不揮発性半導体記憶装置のエラー訂正回路及びそのエラー訂正方法

Publications (2)

Publication Number Publication Date
DE69021996D1 true DE69021996D1 (de) 1995-10-05
DE69021996T2 DE69021996T2 (de) 1996-04-18

Family

ID=17862534

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69021996T Expired - Fee Related DE69021996T2 (de) 1989-11-16 1990-11-14 Bitfehlerkorrekturschaltung für einen nichtflüchtigen Speicher.

Country Status (5)

Country Link
US (1) US5206866A (de)
EP (1) EP0428396B1 (de)
JP (1) JP2835107B2 (de)
KR (1) KR0164222B1 (de)
DE (1) DE69021996T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
ES2150430T3 (es) * 1992-06-30 2000-12-01 Siemens Ag Procedimiento para el aseguramiento de los datos en memorias de escritura y de lectura.
US5359570A (en) * 1992-11-13 1994-10-25 Silicon Storage Technology, Inc. Solid state peripheral storage device
FR2802697B1 (fr) * 1999-12-15 2005-03-04 St Microelectronics Sa Procede de lecture d'une cellule memoire non volatile
JP4194310B2 (ja) * 2002-07-19 2008-12-10 株式会社ルネサステクノロジ 電子装置
EP1830269B1 (de) * 2006-03-02 2009-05-13 STMicroelectronics S.r.l. Leseverfahren eines Speichers mit eingebetteter Fehlerkorrekturkode und Speicher mit eingebetteter Fehlerkorrekturkode
US7904793B2 (en) * 2007-03-29 2011-03-08 Sandisk Corporation Method for decoding data in non-volatile storage using reliability metrics based on multiple reads
JP2009093714A (ja) * 2007-10-04 2009-04-30 Panasonic Corp 半導体記憶装置
US8286061B2 (en) * 2009-05-27 2012-10-09 International Business Machines Corporation Error detection using parity compensation in binary coded decimal and densely packed decimal conversions
KR101218886B1 (ko) * 2010-11-24 2013-01-07 재단법인대구경북과학기술원 메모리 보호를 위한 컨트롤러 장치 및 컨트롤러 장치의 동작 방법
US10304550B1 (en) 2017-11-29 2019-05-28 Sandisk Technologies Llc Sense amplifier with negative threshold sensing for non-volatile memory
US10643695B1 (en) 2019-01-10 2020-05-05 Sandisk Technologies Llc Concurrent multi-state program verify for non-volatile memory
US11024392B1 (en) 2019-12-23 2021-06-01 Sandisk Technologies Llc Sense amplifier for bidirectional sensing of memory cells of a non-volatile memory

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3430197A (en) * 1965-10-21 1969-02-25 Itt Error correction circuit for digital recording systems
DE3332601A1 (de) * 1983-09-09 1985-03-28 Siemens AG, 1000 Berlin und 8000 München Schaltungsanordnung zum registrieren von adressen von einen fehlerhaften speicherinhalt aufweisenden speicherzellen
US4774712A (en) * 1986-10-01 1988-09-27 International Business Machines Corporation Redundant storage device having address determined by parity of lower address bits
JPH0654476B2 (ja) * 1987-03-04 1994-07-20 日本電気株式会社 制御メモリ誤り訂正制御方式
JP2509297B2 (ja) * 1987-08-31 1996-06-19 沖電気工業株式会社 自己訂正機能付半導体記憶装置及びマイクロコンピュ―タ

Also Published As

Publication number Publication date
DE69021996T2 (de) 1996-04-18
KR0164222B1 (ko) 1999-01-15
US5206866A (en) 1993-04-27
JP2835107B2 (ja) 1998-12-14
JPH03157900A (ja) 1991-07-05
KR910010308A (ko) 1991-06-29
EP0428396A3 (en) 1992-04-15
EP0428396A2 (de) 1991-05-22
EP0428396B1 (de) 1995-08-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee