DE69006447D1 - Kaskaden-Montierung von parallelgeschalteten Transistoren realisiert in Hybridschaltungstechnologie. - Google Patents

Kaskaden-Montierung von parallelgeschalteten Transistoren realisiert in Hybridschaltungstechnologie.

Info

Publication number
DE69006447D1
DE69006447D1 DE90119251T DE69006447T DE69006447D1 DE 69006447 D1 DE69006447 D1 DE 69006447D1 DE 90119251 T DE90119251 T DE 90119251T DE 69006447 T DE69006447 T DE 69006447T DE 69006447 D1 DE69006447 D1 DE 69006447D1
Authority
DE
Germany
Prior art keywords
parallel
hybrid circuit
circuit technology
connected transistors
cascade mounting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE90119251T
Other languages
English (en)
Other versions
DE69006447T2 (de
Inventor
Jacques Chave
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alstom Holdings SA
Original Assignee
GEC Alsthom SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by GEC Alsthom SA filed Critical GEC Alsthom SA
Publication of DE69006447D1 publication Critical patent/DE69006447D1/de
Application granted granted Critical
Publication of DE69006447T2 publication Critical patent/DE69006447T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/30107—Inductance

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Amplifiers (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Bipolar Integrated Circuits (AREA)
DE90119251T 1989-10-11 1990-10-08 Kaskaden-Montierung von parallelgeschalteten Transistoren realisiert in Hybridschaltungstechnologie. Expired - Fee Related DE69006447T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8913277A FR2652983B1 (fr) 1989-10-11 1989-10-11 Montage en cascade d'etages de transistors en parallele realise en circuit hybride.

Publications (2)

Publication Number Publication Date
DE69006447D1 true DE69006447D1 (de) 1994-03-17
DE69006447T2 DE69006447T2 (de) 1994-05-11

Family

ID=9386284

Family Applications (1)

Application Number Title Priority Date Filing Date
DE90119251T Expired - Fee Related DE69006447T2 (de) 1989-10-11 1990-10-08 Kaskaden-Montierung von parallelgeschalteten Transistoren realisiert in Hybridschaltungstechnologie.

Country Status (7)

Country Link
US (1) US5040050A (de)
EP (1) EP0422554B1 (de)
JP (1) JPH03150868A (de)
AT (1) ATE101303T1 (de)
DE (1) DE69006447T2 (de)
ES (1) ES2050906T3 (de)
FR (1) FR2652983B1 (de)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7402846B2 (en) * 2005-10-20 2008-07-22 Atmel Corporation Electrostatic discharge (ESD) protection structure and a circuit using the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
USRE27730E (en) * 1969-08-19 1973-08-14 Difference amplifier with parallel, isolated emitter configuration
IT1212708B (it) * 1983-02-28 1989-11-30 Ates Componenti Elettron Dispositivo di potenza a semiconduttore costituito da una molteplicita' di elementi attivi uguali collegati in parallelo.
JPH088269B2 (ja) * 1986-10-22 1996-01-29 シーメンス、アクチエンゲゼルシヤフト 半導体デバイス
US4907068A (en) * 1987-01-21 1990-03-06 Siemens Aktiengesellschaft Semiconductor arrangement having at least one semiconductor body
FR2620862B1 (fr) * 1987-09-17 1990-04-06 Thomson Semiconducteurs Montage en parallele de transistors mos de puissance

Also Published As

Publication number Publication date
EP0422554A1 (de) 1991-04-17
ES2050906T3 (es) 1994-06-01
DE69006447T2 (de) 1994-05-11
FR2652983A1 (fr) 1991-04-12
US5040050A (en) 1991-08-13
ATE101303T1 (de) 1994-02-15
EP0422554B1 (de) 1994-02-02
JPH03150868A (ja) 1991-06-27
FR2652983B1 (fr) 1993-04-30

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee