DE68928185T2 - Herstellung elektronischer Bauelemente mit Hilfe von Leiterrahmen - Google Patents

Herstellung elektronischer Bauelemente mit Hilfe von Leiterrahmen

Info

Publication number
DE68928185T2
DE68928185T2 DE68928185T DE68928185T DE68928185T2 DE 68928185 T2 DE68928185 T2 DE 68928185T2 DE 68928185 T DE68928185 T DE 68928185T DE 68928185 T DE68928185 T DE 68928185T DE 68928185 T2 DE68928185 T2 DE 68928185T2
Authority
DE
Germany
Prior art keywords
help
manufacture
electronic components
lead frames
frames
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68928185T
Other languages
English (en)
Other versions
DE68928185D1 (de
Inventor
Toshiaki Suzuki
Yoji Murakami
Masao Kobayashi
Osamu Yamauchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE68928185D1 publication Critical patent/DE68928185D1/de
Publication of DE68928185T2 publication Critical patent/DE68928185T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H01L23/49541—Geometry of the lead-frame
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
    • H01L21/4814—Conductive parts
    • H01L21/4821—Flat leads, e.g. lead frames with or without insulating supports
    • H01L21/4842—Mechanical treatment, e.g. punching, cutting, deforming, cold welding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/495—Lead-frames or other flat leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01021—Scandium [Sc]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y10T29/49121—Beam lead frame or beam lead device

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
DE68928185T 1988-02-24 1989-02-24 Herstellung elektronischer Bauelemente mit Hilfe von Leiterrahmen Expired - Fee Related DE68928185T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63042815A JPH0828455B2 (ja) 1988-02-24 1988-02-24 リードフレーム及びそれを用いた電子部品の製造方法

Publications (2)

Publication Number Publication Date
DE68928185D1 DE68928185D1 (de) 1997-08-28
DE68928185T2 true DE68928185T2 (de) 1997-11-13

Family

ID=12646446

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68928185T Expired - Fee Related DE68928185T2 (de) 1988-02-24 1989-02-24 Herstellung elektronischer Bauelemente mit Hilfe von Leiterrahmen

Country Status (5)

Country Link
US (2) US4977442A (de)
EP (1) EP0330512B1 (de)
JP (1) JPH0828455B2 (de)
KR (1) KR920010198B1 (de)
DE (1) DE68928185T2 (de)

Families Citing this family (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0793400B2 (ja) * 1990-03-06 1995-10-09 株式会社東芝 半導体装置
CA2036727C (en) * 1990-03-13 1998-12-22 Hisao Go Optical module including receptacle, and method of producing the same
DE69125884T2 (de) * 1990-03-16 1997-08-14 Sumitomo Electric Industries Leiterrahmen für Halbleiteranordnung
JPH0464256A (ja) * 1990-07-04 1992-02-28 Mitsubishi Electric Corp 半導体装置の製造方法
AU631000B2 (en) * 1990-08-28 1992-11-12 Sumitomo Electric Industries, Ltd. Optical module
US5192681A (en) * 1990-08-31 1993-03-09 Texas Instruments Incorporated Low cost erasable programmable read only memory package
NL9100470A (nl) * 1991-03-15 1992-10-01 Asm Fico Tooling Werkwijze en inrichting voor het uit op een leadframe opgenomen geintegreerde schakelingen vervaardigen van een enkelvoudig produkt.
JP2608192B2 (ja) * 1991-04-26 1997-05-07 三菱電機株式会社 リードフレーム
JPH0529427A (ja) * 1991-07-24 1993-02-05 Nec Corp 半導体装置の製造方法
US5155902A (en) * 1991-07-29 1992-10-20 Fierkens Richard H J Method of packaging a semiconductor device
US5289032A (en) * 1991-08-16 1994-02-22 Motorola, Inc. Tape automated bonding(tab)semiconductor device and method for making the same
MX9205128A (es) * 1991-09-30 1993-04-01 Motorola Inc Metodo para procesar un bloque de circuito integrado semiconductor.
EP0537982A2 (de) * 1991-10-14 1993-04-21 Fujitsu Limited Halbleiteranordnung mit verbesserten Leitern
US5541447A (en) * 1992-04-22 1996-07-30 Yamaha Corporation Lead frame
NL195026C (nl) * 1992-04-22 2003-06-18 Yamaha Corporation Werkwijze voor het bewerken van een raam van elektrische geleiders voor een halfgeleiderelement.
JP3016658B2 (ja) * 1992-04-28 2000-03-06 ローム株式会社 リードフレーム並びに半導体装置およびその製法
EP0664923B1 (de) * 1992-10-14 2001-06-06 Micron Technology Inc. Verfahren und vorrichtung zum formen der anschlussbeinchen von integrierten schaltkreisen
US5543657A (en) * 1994-10-07 1996-08-06 International Business Machines Corporation Single layer leadframe design with groundplane capability
US5886397A (en) * 1996-09-05 1999-03-23 International Rectifier Corporation Crushable bead on lead finger side surface to improve moldability
US5939775A (en) * 1996-11-05 1999-08-17 Gcb Technologies, Llc Leadframe structure and process for packaging intergrated circuits
WO1999023700A1 (en) 1997-11-05 1999-05-14 Martin Robert A Chip housing, methods of making same and methods for mounting chips therein
JP2000188366A (ja) * 1998-12-24 2000-07-04 Hitachi Ltd 半導体装置
US7132734B2 (en) * 2003-01-06 2006-11-07 Micron Technology, Inc. Microelectronic component assemblies and microelectronic component lead frame structures
DE10303455B4 (de) * 2003-01-29 2007-11-29 Osram Opto Semiconductors Gmbh Leiterrahmenband und Verfahren zum Herstellen einer Mehrzahl von Leiterrahmen-basierten Leuchtdiodenbauelementen
US7145762B2 (en) 2003-02-11 2006-12-05 Taser International, Inc. Systems and methods for immobilizing using plural energy stores
US7183485B2 (en) * 2003-03-11 2007-02-27 Micron Technology, Inc. Microelectronic component assemblies having lead frames adapted to reduce package bow
WO2007102041A1 (en) * 2006-03-09 2007-09-13 Infineon Technologies Ag Lead fingers of a semiconductor chip with an even layer of coating
JP4921016B2 (ja) * 2006-03-31 2012-04-18 ルネサスエレクトロニクス株式会社 リードカット装置および半導体装置の製造方法
CN101312112B (zh) * 2007-05-21 2011-10-05 中芯国际集成电路制造(上海)有限公司 芯片封装外引线成型模具

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4012766A (en) * 1973-08-28 1977-03-15 Western Digital Corporation Semiconductor package and method of manufacture thereof
JPS5212573A (en) * 1975-07-21 1977-01-31 Hitachi Ltd Reed frame
JPS5521128A (en) * 1978-08-02 1980-02-15 Hitachi Ltd Lead frame used for semiconductor device and its assembling
US4214364A (en) * 1979-05-21 1980-07-29 Northern Telecom Limited Hermetic and non-hermetic packaging of devices
CA1145860A (en) * 1981-01-29 1983-05-03 John C. Walker Leadframe for leaded semiconductor chip carriers
US4477827A (en) * 1981-02-02 1984-10-16 Northern Telecom Limited Lead frame for leaded semiconductor chip carriers
US4441118A (en) * 1983-01-13 1984-04-03 Olin Corporation Composite copper nickel alloys with improved solderability shelf life
JPS615557A (ja) * 1984-06-20 1986-01-11 Hitachi Ltd リ−ドフレ−ム
JPS61269345A (ja) * 1985-05-24 1986-11-28 Hitachi Ltd 半導体装置
JPH0656870B2 (ja) * 1985-06-05 1994-07-27 住友電気工業株式会社 Ｉｃ用リ−ドフレ−ム
JPS6273554U (de) * 1985-10-28 1987-05-11
US4905074A (en) * 1985-11-29 1990-02-27 Olin Corporation Interdiffusion resistant Fe-Ni alloys having improved glass sealing property
US4721993A (en) * 1986-01-31 1988-01-26 Olin Corporation Interconnect tape for use in tape automated bonding
US4829362A (en) * 1986-04-28 1989-05-09 Motorola, Inc. Lead frame with die bond flag for ceramic packages
JPS63148670A (ja) * 1986-12-12 1988-06-21 Texas Instr Japan Ltd リ−ドフレ−ム材
JPH01145839A (ja) * 1987-12-02 1989-06-07 Rhythm Watch Co Ltd リードフレーム

Also Published As

Publication number Publication date
US5094982A (en) 1992-03-10
US4977442A (en) 1990-12-11
KR920010198B1 (ko) 1992-11-21
JPH0828455B2 (ja) 1996-03-21
EP0330512A2 (de) 1989-08-30
JPH01216564A (ja) 1989-08-30
DE68928185D1 (de) 1997-08-28
EP0330512B1 (de) 1997-07-23
EP0330512A3 (de) 1992-05-06
KR890013766A (ko) 1989-09-25

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee