DE68917793T2 - Integrierte Vorrichtung in Halbleiterscheibengrösse. - Google Patents

Integrierte Vorrichtung in Halbleiterscheibengrösse.

Info

Publication number
DE68917793T2
DE68917793T2 DE68917793T DE68917793T DE68917793T2 DE 68917793 T2 DE68917793 T2 DE 68917793T2 DE 68917793 T DE68917793 T DE 68917793T DE 68917793 T DE68917793 T DE 68917793T DE 68917793 T2 DE68917793 T2 DE 68917793T2
Authority
DE
Germany
Prior art keywords
integrated device
wafer size
wafer
size
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE68917793T
Other languages
English (en)
Other versions
DE68917793D1 (de
Inventor
Takeo Tatematsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE68917793D1 publication Critical patent/DE68917793D1/de
Application granted granted Critical
Publication of DE68917793T2 publication Critical patent/DE68917793T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H01L23/5286—Arrangements of power or ground buses
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/006—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation at wafer scale level, i.e. wafer scale integration [WSI]
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C5/00—Details of stores covered by group G11C11/00
    • G11C5/06—Arrangements for interconnecting storage elements electrically, e.g. by wiring
    • G11C5/063—Voltage and signal distribution in integrated semi-conductor memory access lines, e.g. word-line, bit-line, cross-over resistance, propagation delay
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
    • H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L24/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01039—Yttrium [Y]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Geometry (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Wire Bonding (AREA)
  • Semiconductor Memories (AREA)
DE68917793T 1988-06-01 1989-06-01 Integrierte Vorrichtung in Halbleiterscheibengrösse. Expired - Fee Related DE68917793T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63132589A JP2516403B2 (ja) 1988-06-01 1988-06-01 ウエハ・スケ―ル・メモリ

Publications (2)

Publication Number Publication Date
DE68917793D1 DE68917793D1 (de) 1994-10-06
DE68917793T2 true DE68917793T2 (de) 1995-01-05

Family

ID=15084877

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68917793T Expired - Fee Related DE68917793T2 (de) 1988-06-01 1989-06-01 Integrierte Vorrichtung in Halbleiterscheibengrösse.

Country Status (5)

Country Link
US (1) US5138419A (de)
EP (1) EP0345162B1 (de)
JP (1) JP2516403B2 (de)
KR (1) KR920008423B1 (de)
DE (1) DE68917793T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5767565A (en) * 1996-07-22 1998-06-16 Alliance Semiconductor Corporation Semiconductor devices having cooperative mode option at assembly stage and method thereof
US6664628B2 (en) * 1998-07-13 2003-12-16 Formfactor, Inc. Electronic component overlapping dice of unsingulated semiconductor wafer
US6700142B1 (en) * 2001-12-31 2004-03-02 Hyperchip Inc. Semiconductor wafer on which is fabricated an integrated circuit including an array of discrete functional modules
JP5309728B2 (ja) * 2008-06-27 2013-10-09 富士通セミコンダクター株式会社 レチクルデータ作成方法及びレチクルデータ作成装置
US9899324B1 (en) * 2016-11-28 2018-02-20 Globalfoundries Inc. Structure and method of conductive bus bar for resistive seed substrate plating

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5568668A (en) * 1978-11-20 1980-05-23 Nippon Telegr & Teleph Corp <Ntt> Semiconductor device
JPS5779655A (en) * 1980-11-05 1982-05-18 Ricoh Co Ltd Manufacture of integrated circuit chip
JPS58143550A (ja) * 1982-02-22 1983-08-26 Nec Corp 半導体装置
JPS59107532A (ja) * 1982-12-13 1984-06-21 Nec Corp 半導体装置
JPS59197151A (ja) * 1983-04-22 1984-11-08 Toshiba Corp 半導体集積回路装置
FR2547112B1 (fr) * 1983-06-03 1986-11-21 Thomson Csf Procede de realisation d'un circuit hybride et circuit hybride logique ou analogique
JPS6020526A (ja) * 1983-07-15 1985-02-01 Hitachi Ltd 半導体装置
JPS6049648A (ja) * 1983-08-30 1985-03-18 Sumitomo Electric Ind Ltd マスタスライスｉｃ
US4703436A (en) * 1984-02-01 1987-10-27 Inova Microelectronics Corporation Wafer level integration technique
JPH0714002B2 (ja) * 1984-05-15 1995-02-15 セイコーエプソン株式会社 チップへの信号供給方法
JPS6130044A (ja) * 1984-07-20 1986-02-12 Nippon Denso Co Ltd 半導体チツプの検査方法
JPS6187349A (ja) * 1984-10-04 1986-05-02 Nippon Denso Co Ltd 半導体ウエハ
JPS61214559A (ja) * 1985-03-20 1986-09-24 Hitachi Ltd 半導体集積回路装置
GB2177825B (en) * 1985-07-12 1989-07-26 Anamartic Ltd Control system for chained circuit modules
JPS62179755A (ja) * 1986-02-03 1987-08-06 Mitsubishi Electric Corp テスト回路内蔵半導体集積回路
JPS62219957A (ja) * 1986-03-20 1987-09-28 Fujitsu Ltd Ｌｓｉ素子内の入出力回路
JPS62224056A (ja) * 1986-03-26 1987-10-02 Hitachi Ltd 半導体装置
JPS62238637A (ja) * 1986-04-09 1987-10-19 Nec Kansai Ltd パタ−ン位置合わせ方法
JPS63114246A (ja) * 1986-10-31 1988-05-19 Mitsubishi Electric Corp 半導体装置
JPH03106029A (ja) * 1989-09-20 1991-05-02 Fujitsu Ltd ウエハ・スケール・ｉｃ

Also Published As

Publication number Publication date
EP0345162A1 (de) 1989-12-06
EP0345162B1 (de) 1994-08-31
KR910001967A (ko) 1991-01-31
US5138419A (en) 1992-08-11
JPH01303750A (ja) 1989-12-07
JP2516403B2 (ja) 1996-07-24
KR920008423B1 (ko) 1992-09-28
DE68917793D1 (de) 1994-10-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee