DE606451T1 - Logikzelle für feldprogrammierbares gatterfeld mit schaltbarer interner rückkopplung und schaltbarer kaskadierung von logikzellen. - Google Patents

Logikzelle für feldprogrammierbares gatterfeld mit schaltbarer interner rückkopplung und schaltbarer kaskadierung von logikzellen.

Info

Publication number
DE606451T1
DE606451T1 DE0606451T DE93917290T DE606451T1 DE 606451 T1 DE606451 T1 DE 606451T1 DE 0606451 T DE0606451 T DE 0606451T DE 93917290 T DE93917290 T DE 93917290T DE 606451 T1 DE606451 T1 DE 606451T1
Authority
DE
Germany
Prior art keywords
logic
signal
input
output
function
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE0606451T
Other languages
German (de)
English (en)
Inventor
F Goetting
Stephen Trimberger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xilinx Inc
Original Assignee
Xilinx Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xilinx Inc filed Critical Xilinx Inc
Publication of DE606451T1 publication Critical patent/DE606451T1/de
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17724—Structural details of logic blocks
    • H03K19/17728—Reconfigurable logic blocks, e.g. lookup tables
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/1733—Controllable logic circuits
    • H03K19/1735—Controllable logic circuits by wiring, e.g. uncommitted logic arrays
    • H03K19/1736—Controllable logic circuits by wiring, e.g. uncommitted logic arrays in which the wiring can be modified
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
    • H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
    • H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns

Landscapes

  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Logic Circuits (AREA)
DE0606451T 1992-07-29 1993-07-23 Logikzelle für feldprogrammierbares gatterfeld mit schaltbarer interner rückkopplung und schaltbarer kaskadierung von logikzellen. Pending DE606451T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US92230592A 1992-07-29 1992-07-29
PCT/US1993/006816 WO1994003978A1 (en) 1992-07-29 1993-07-23 Logic cell for field programmable gate array having optional internal feedback and optional cascade

Publications (1)

Publication Number Publication Date
DE606451T1 true DE606451T1 (de) 1995-05-18

Family

ID=25446864

Family Applications (1)

Application Number Title Priority Date Filing Date
DE0606451T Pending DE606451T1 (de) 1992-07-29 1993-07-23 Logikzelle für feldprogrammierbares gatterfeld mit schaltbarer interner rückkopplung und schaltbarer kaskadierung von logikzellen.

Country Status (4)

Country Link
EP (1) EP0606451A1 (ja)
JP (1) JPH07502637A (ja)
DE (1) DE606451T1 (ja)
WO (1) WO1994003978A1 (ja)

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4871930A (en) * 1988-05-05 1989-10-03 Altera Corporation Programmable logic device with array blocks connected via programmable interconnect

Also Published As

Publication number Publication date
JPH07502637A (ja) 1995-03-16
EP0606451A1 (en) 1994-07-20
WO1994003978A1 (en) 1994-02-17

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