DE3786178T2 - Schaltung zum angleichen der signalverzoegerungszeiten. - Google Patents

Schaltung zum angleichen der signalverzoegerungszeiten.

Info

Publication number
DE3786178T2
DE3786178T2 DE19873786178 DE3786178T DE3786178T2 DE 3786178 T2 DE3786178 T2 DE 3786178T2 DE 19873786178 DE19873786178 DE 19873786178 DE 3786178 T DE3786178 T DE 3786178T DE 3786178 T2 DE3786178 T2 DE 3786178T2
Authority
DE
Germany
Prior art keywords
adjusting
circuit
signal delay
delay times
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE19873786178
Other languages
English (en)
Other versions
DE3786178D1 (de
Inventor
David P Chengson
William H Wang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tandem Computers Inc
Original Assignee
Tandem Computers Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US06/889,439 external-priority patent/US5041747A/en
Application filed by Tandem Computers Inc filed Critical Tandem Computers Inc
Application granted granted Critical
Publication of DE3786178D1 publication Critical patent/DE3786178D1/de
Publication of DE3786178T2 publication Critical patent/DE3786178T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10—Regulating voltage or current
    • G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
    • G05F1/462—Regulating voltage or current wherein the variable actually regulated by the final control device is dc as a function of the requirements of the load, e.g. delay, temperature, specific voltage/current characteristic
    • G05F1/466—Sources with reduced influence on propagation delay
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00323—Delay compensation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/082—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using bipolar transistors
    • H03K19/086—Emitter coupled logic

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Electromagnetism (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Logic Circuits (AREA)
  • Electronic Switches (AREA)
DE19873786178 1986-01-16 1987-01-16 Schaltung zum angleichen der signalverzoegerungszeiten. Expired - Fee Related DE3786178T2 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US81978986A 1986-01-16 1986-01-16
US06/889,439 US5041747A (en) 1986-07-23 1986-07-23 Delay regulation circuit

Publications (2)

Publication Number Publication Date
DE3786178D1 DE3786178D1 (de) 1993-07-22
DE3786178T2 true DE3786178T2 (de) 1993-09-23

Family

ID=27124393

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19873786178 Expired - Fee Related DE3786178T2 (de) 1986-01-16 1987-01-16 Schaltung zum angleichen der signalverzoegerungszeiten.

Country Status (3)

Country Link
EP (1) EP0229726B1 (de)
AU (1) AU591747B2 (de)
DE (1) DE3786178T2 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4980586A (en) * 1987-10-07 1990-12-25 Tektronix, Inc. Digital integrated circuit propagation delay regulator
JP2547909B2 (ja) * 1990-10-11 1996-10-30 インターナショナル・ビジネス・マシーンズ・コーポレイション 可変自己補正ディジタル遅延回路
US5237224A (en) * 1990-10-11 1993-08-17 International Business Machines Corporation Variable self-correcting digital delay circuit

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4346343A (en) * 1980-05-16 1982-08-24 International Business Machines Corporation Power control means for eliminating circuit to circuit delay differences and providing a desired circuit delay
EP0151875B1 (de) * 1983-12-09 1990-11-07 Fujitsu Limited Tor-Schaltungsanordnung
US4577125A (en) * 1983-12-22 1986-03-18 Advanced Micro Devices, Inc. Output voltage driver with transient active pull-down

Also Published As

Publication number Publication date
AU6755687A (en) 1987-07-23
EP0229726B1 (de) 1993-06-16
AU591747B2 (en) 1989-12-14
DE3786178D1 (de) 1993-07-22
EP0229726A1 (de) 1987-07-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee