DE60325089D1 - Mram-architektur mit elektrisch isolierten lese-schreib-schaltkreisen - Google Patents
Mram-architektur mit elektrisch isolierten lese-schreib-schaltkreisenInfo
- Publication number
- DE60325089D1 DE60325089D1 DE60325089T DE60325089T DE60325089D1 DE 60325089 D1 DE60325089 D1 DE 60325089D1 DE 60325089 T DE60325089 T DE 60325089T DE 60325089 T DE60325089 T DE 60325089T DE 60325089 D1 DE60325089 D1 DE 60325089D1
- Authority
- DE
- Germany
- Prior art keywords
- write
- read
- memory
- reduces
- functions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/14—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements
- G11C11/15—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using thin-film elements using multiple magnetic layers
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1653—Address circuits or decoders
- G11C11/1655—Bit-line or column circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1673—Reading or sensing circuits or methods
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/02—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
- G11C11/16—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
- G11C11/165—Auxiliary circuits
- G11C11/1675—Writing or programming circuits or methods
Landscapes
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Mram Or Spin Memory Techniques (AREA)
- Hall/Mr Elements (AREA)
- Semiconductor Memories (AREA)
- Static Random-Access Memory (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/185,868 US6903964B2 (en) | 2002-06-28 | 2002-06-28 | MRAM architecture with electrically isolated read and write circuitry |
PCT/US2003/013094 WO2004003921A2 (en) | 2002-06-28 | 2003-04-29 | Mram architecture with electrically isolated read write circuitry |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60325089D1 true DE60325089D1 (de) | 2009-01-15 |
Family
ID=29779755
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60325089T Expired - Lifetime DE60325089D1 (de) | 2002-06-28 | 2003-04-29 | Mram-architektur mit elektrisch isolierten lese-schreib-schaltkreisen |
Country Status (10)
Country | Link |
---|---|
US (2) | US6903964B2 (de) |
EP (1) | EP1573743B1 (de) |
JP (1) | JP2006508481A (de) |
KR (1) | KR20050009763A (de) |
CN (1) | CN100437818C (de) |
AT (1) | ATE416460T1 (de) |
AU (1) | AU2003228725A1 (de) |
DE (1) | DE60325089D1 (de) |
TW (1) | TWI310552B (de) |
WO (1) | WO2004003921A2 (de) |
Families Citing this family (21)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2002230965A (ja) * | 2001-01-24 | 2002-08-16 | Internatl Business Mach Corp <Ibm> | 不揮発性メモリ装置 |
KR100548997B1 (ko) * | 2003-08-12 | 2006-02-02 | 삼성전자주식회사 | 다층박막구조의 자유층을 갖는 자기터널 접합 구조체들 및이를 채택하는 자기 램 셀들 |
US7209383B2 (en) * | 2004-06-16 | 2007-04-24 | Stmicroelectronics, Inc. | Magnetic random access memory array having bit/word lines for shared write select and read operations |
JP4874658B2 (ja) * | 2005-02-04 | 2012-02-15 | 株式会社東芝 | 不揮発性半導体記憶装置 |
JP2006294179A (ja) * | 2005-04-14 | 2006-10-26 | Renesas Technology Corp | 不揮発性記憶装置 |
US7276925B2 (en) * | 2005-07-01 | 2007-10-02 | P.A. Semi, Inc. | Operating an integrated circuit at a minimum supply voltage |
US7652494B2 (en) | 2005-07-01 | 2010-01-26 | Apple Inc. | Operating an integrated circuit at a minimum supply voltage |
WO2007049353A1 (ja) * | 2005-10-28 | 2007-05-03 | Fujitsu Limited | 磁気メモリ装置及びその書き込み方法 |
US8072792B2 (en) * | 2008-02-15 | 2011-12-06 | Qimonda Ag | Integrated circuit with resistive memory cells and method for manufacturing same |
CN104200834A (zh) * | 2008-10-06 | 2014-12-10 | 株式会社日立制作所 | 半导体器件 |
US7915910B2 (en) | 2009-01-28 | 2011-03-29 | Apple Inc. | Dynamic voltage and frequency management |
US8519495B2 (en) * | 2009-02-17 | 2013-08-27 | Seagate Technology Llc | Single line MRAM |
US8111544B2 (en) * | 2009-02-23 | 2012-02-07 | Taiwan Semiconductor Manufacturing Company, Ltd. | Programming MRAM cells using probability write |
US8363460B2 (en) * | 2010-04-07 | 2013-01-29 | Avalanche Technology, Inc. | Method and apparatus for programming a magnetic tunnel junction (MTJ) |
CN103456356A (zh) | 2012-05-31 | 2013-12-18 | 三星电子株式会社 | 半导体存储器装置和相关的操作方法 |
KR20140067254A (ko) | 2012-11-26 | 2014-06-05 | 삼성전자주식회사 | 메모리 시스템과 이의 동작 방법 |
WO2014205335A1 (en) * | 2013-06-21 | 2014-12-24 | Lawrence Pileggi | Bitcell wth magnetic switching elements |
KR102645776B1 (ko) * | 2016-11-18 | 2024-03-11 | 에스케이하이닉스 주식회사 | 저항성 메모리 장치, 이를 위한 리드 회로 및 방법 |
JP6276447B1 (ja) * | 2017-03-24 | 2018-02-07 | 株式会社フローディア | 不揮発性半導体記憶装置 |
JP2020155179A (ja) * | 2019-03-20 | 2020-09-24 | キオクシア株式会社 | 半導体記憶装置 |
JP2021044041A (ja) * | 2019-09-12 | 2021-03-18 | キオクシア株式会社 | 半導体記憶装置 |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US123281A (en) * | 1872-01-30 | Improvement in harness-buckles | ||
JPS58220293A (ja) * | 1982-06-15 | 1983-12-21 | Nec Corp | 記憶装置 |
JPH08194679A (ja) * | 1995-01-19 | 1996-07-30 | Texas Instr Japan Ltd | ディジタル信号処理方法及び装置並びにメモリセル読出し方法 |
US6246083B1 (en) * | 1998-02-24 | 2001-06-12 | Micron Technology, Inc. | Vertical gain cell and array for a dynamic random access memory |
US6246386B1 (en) * | 1998-06-18 | 2001-06-12 | Agilent Technologies, Inc. | Integrated micro-display system |
US5946227A (en) * | 1998-07-20 | 1999-08-31 | Motorola, Inc. | Magnetoresistive random access memory with shared word and digit lines |
US6111781A (en) * | 1998-08-03 | 2000-08-29 | Motorola, Inc. | Magnetic random access memory array divided into a plurality of memory banks |
US6391483B1 (en) * | 1999-03-30 | 2002-05-21 | Carnegie Mellon University | Magnetic device and method of forming same |
KR100366702B1 (ko) * | 2000-02-03 | 2003-01-08 | 삼성전자 주식회사 | 쓰기 및 읽기 회로를 갖는 자기 터널 접합 소자를 이용한자기 랜덤 액세스 메모리 |
US6185143B1 (en) * | 2000-02-04 | 2001-02-06 | Hewlett-Packard Company | Magnetic random access memory (MRAM) device including differential sense amplifiers |
US6191989B1 (en) * | 2000-03-07 | 2001-02-20 | International Business Machines Corporation | Current sensing amplifier |
KR100365296B1 (ko) * | 2000-08-01 | 2002-12-18 | 한국과학기술연구원 | 비파괴 판독형 비휘발성 강유전체 메모리의 구동 회로 |
US6272041B1 (en) * | 2000-08-28 | 2001-08-07 | Motorola, Inc. | MTJ MRAM parallel-parallel architecture |
KR100451096B1 (ko) * | 2000-09-19 | 2004-10-02 | 엔이씨 일렉트로닉스 가부시키가이샤 | 자기메모리셀어레이를 갖는 비휘발성 반도체메모리장치 |
JP4656720B2 (ja) * | 2000-09-25 | 2011-03-23 | ルネサスエレクトロニクス株式会社 | 薄膜磁性体記憶装置 |
US6335890B1 (en) * | 2000-11-01 | 2002-01-01 | International Business Machines Corporation | Segmented write line architecture for writing magnetic random access memories |
KR100380347B1 (ko) * | 2000-11-21 | 2003-04-11 | 삼성전자주식회사 | 반도체 메모리 장치 및 이 장치의 데이터 리드 방법 |
JP3812805B2 (ja) * | 2001-01-16 | 2006-08-23 | 日本電気株式会社 | トンネル磁気抵抗素子を利用した半導体記憶装置 |
JP2002230965A (ja) * | 2001-01-24 | 2002-08-16 | Internatl Business Mach Corp <Ibm> | 不揮発性メモリ装置 |
US6743681B2 (en) * | 2001-11-09 | 2004-06-01 | Micron Technology, Inc. | Methods of Fabricating Gate and Storage Dielectric Stacks having Silicon-Rich-Nitride |
US6795334B2 (en) * | 2001-12-21 | 2004-09-21 | Kabushiki Kaisha Toshiba | Magnetic random access memory |
US6839269B2 (en) | 2001-12-28 | 2005-01-04 | Kabushiki Kaisha Toshiba | Magnetic random access memory |
US6498747B1 (en) * | 2002-02-08 | 2002-12-24 | Infineon Technologies Ag | Magnetoresistive random access memory (MRAM) cross-point array with reduced parasitic effects |
-
2002
- 2002-06-28 US US10/185,868 patent/US6903964B2/en not_active Expired - Fee Related
-
2003
- 2003-04-29 KR KR10-2004-7021254A patent/KR20050009763A/ko not_active Application Discontinuation
- 2003-04-29 CN CNB03815272XA patent/CN100437818C/zh not_active Expired - Fee Related
- 2003-04-29 WO PCT/US2003/013094 patent/WO2004003921A2/en active Application Filing
- 2003-04-29 JP JP2004517525A patent/JP2006508481A/ja active Pending
- 2003-04-29 EP EP03726492A patent/EP1573743B1/de not_active Expired - Lifetime
- 2003-04-29 DE DE60325089T patent/DE60325089D1/de not_active Expired - Lifetime
- 2003-04-29 AT AT03726492T patent/ATE416460T1/de not_active IP Right Cessation
- 2003-04-29 AU AU2003228725A patent/AU2003228725A1/en not_active Abandoned
- 2003-06-27 TW TW092117683A patent/TWI310552B/zh not_active IP Right Cessation
-
2005
- 2005-03-09 US US11/076,523 patent/US7154772B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR20050009763A (ko) | 2005-01-25 |
US20040001358A1 (en) | 2004-01-01 |
EP1573743B1 (de) | 2008-12-03 |
CN100437818C (zh) | 2008-11-26 |
US6903964B2 (en) | 2005-06-07 |
WO2004003921A3 (en) | 2005-11-24 |
AU2003228725A1 (en) | 2004-01-19 |
TW200409116A (en) | 2004-06-01 |
US20050152183A1 (en) | 2005-07-14 |
ATE416460T1 (de) | 2008-12-15 |
US7154772B2 (en) | 2006-12-26 |
JP2006508481A (ja) | 2006-03-09 |
CN1757076A (zh) | 2006-04-05 |
TWI310552B (en) | 2009-06-01 |
WO2004003921A2 (en) | 2004-01-08 |
EP1573743A2 (de) | 2005-09-14 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition |