DE602005026918D1 - Techniken zur reduzierung von substrat-nebensprech - Google Patents

Techniken zur reduzierung von substrat-nebensprech

Info

Publication number
DE602005026918D1
DE602005026918D1 DE602005026918T DE602005026918T DE602005026918D1 DE 602005026918 D1 DE602005026918 D1 DE 602005026918D1 DE 602005026918 T DE602005026918 T DE 602005026918T DE 602005026918 T DE602005026918 T DE 602005026918T DE 602005026918 D1 DE602005026918 D1 DE 602005026918D1
Authority
DE
Germany
Prior art keywords
techniques
speed
substrate sub
reducing substrate
reducing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602005026918T
Other languages
German (de)
English (en)
Inventor
Cheisan J Yue
James D Seefeldt
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Honeywell International Inc
Original Assignee
Honeywell International Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Honeywell International Inc filed Critical Honeywell International Inc
Publication of DE602005026918D1 publication Critical patent/DE602005026918D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P90/00—Preparation of wafers not covered by a single main group of this subclass, e.g. wafer reinforcement
    • H10P90/19—Preparing inhomogeneous wafers
    • H10P90/1904—Preparing vertically inhomogeneous wafers
    • H10P90/1906—Preparing SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/011—Manufacture or treatment of isolation regions comprising dielectric materials
    • H10W10/014—Manufacture or treatment of isolation regions comprising dielectric materials using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/051—Manufacture or treatment of isolation region based on field-effect
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/01—Manufacture or treatment
    • H10W10/061—Manufacture or treatment using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/17—Isolation regions comprising dielectric materials formed using trench refilling with dielectric materials, e.g. shallow trench isolations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/10—Isolation regions comprising dielectric materials
    • H10W10/181—Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W10/00—Isolation regions in semiconductor bodies between components of integrated devices
    • H10W10/50—Isolation regions based on field-effect
DE602005026918T 2004-03-26 2005-03-23 Techniken zur reduzierung von substrat-nebensprech Expired - Lifetime DE602005026918D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/811,207 US7851860B2 (en) 2004-03-26 2004-03-26 Techniques to reduce substrate cross talk on mixed signal and RF circuit design
PCT/US2005/009643 WO2005098937A1 (en) 2004-03-26 2005-03-23 Techniques to reduce substrate cross talk on mixed signal and rf circuit design

Publications (1)

Publication Number Publication Date
DE602005026918D1 true DE602005026918D1 (de) 2011-04-28

Family

ID=34963645

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005026918T Expired - Lifetime DE602005026918D1 (de) 2004-03-26 2005-03-23 Techniken zur reduzierung von substrat-nebensprech

Country Status (6)

Country Link
US (2) US7851860B2 (https=)
EP (1) EP1728275B1 (https=)
JP (1) JP5209301B2 (https=)
DE (1) DE602005026918D1 (https=)
TW (1) TWI364091B (https=)
WO (1) WO2005098937A1 (https=)

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WO2003044863A1 (en) * 2001-11-20 2003-05-30 The Regents Of The University Of California Methods of fabricating highly conductive regions in semiconductor substrates for radio frequency applications
US7851860B2 (en) * 2004-03-26 2010-12-14 Honeywell International Inc. Techniques to reduce substrate cross talk on mixed signal and RF circuit design
JP4974474B2 (ja) 2004-06-22 2012-07-11 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP4689244B2 (ja) 2004-11-16 2011-05-25 ルネサスエレクトロニクス株式会社 半導体装置
US8188565B2 (en) * 2005-12-09 2012-05-29 Via Technologies, Inc. Semiconductor chip and shielding structure thereof
US7608913B2 (en) 2006-02-23 2009-10-27 Freescale Semiconductor, Inc. Noise isolation between circuit blocks in an integrated circuit chip
JP4949733B2 (ja) * 2006-05-11 2012-06-13 ルネサスエレクトロニクス株式会社 半導体装置
US7691734B2 (en) * 2007-03-01 2010-04-06 International Business Machines Corporation Deep trench based far subcollector reachthrough
US7718514B2 (en) * 2007-06-28 2010-05-18 International Business Machines Corporation Method of forming a guard ring or contact to an SOI substrate
US7999320B2 (en) * 2008-12-23 2011-08-16 International Business Machines Corporation SOI radio frequency switch with enhanced signal fidelity and electrical isolation
US8026131B2 (en) * 2008-12-23 2011-09-27 International Business Machines Corporation SOI radio frequency switch for reducing high frequency harmonics
US7897477B2 (en) * 2009-01-21 2011-03-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming an isolation structure
US8133774B2 (en) * 2009-03-26 2012-03-13 International Business Machines Corporation SOI radio frequency switch with enhanced electrical isolation
JP5638205B2 (ja) * 2009-06-16 2014-12-10 ルネサスエレクトロニクス株式会社 半導体装置
WO2011086612A1 (ja) * 2010-01-15 2011-07-21 パナソニック株式会社 半導体装置
US8749018B2 (en) 2010-06-21 2014-06-10 Infineon Technologies Ag Integrated semiconductor device having an insulating structure and a manufacturing method
CN102478620B (zh) * 2010-11-25 2013-09-11 上海华虹Nec电子有限公司 射频工艺中射频隔离度的表征方法
EP2602817A1 (en) 2011-12-05 2013-06-12 Nxp B.V. Integrated circuit and IC manufacturing method
US8896102B2 (en) * 2013-01-22 2014-11-25 Freescale Semiconductor, Inc. Die edge sealing structures and related fabrication methods
US20160020279A1 (en) * 2014-07-18 2016-01-21 International Rectifier Corporation Edge Termination Using Guard Rings Between Recessed Field Oxide Regions
US10438902B2 (en) 2017-09-07 2019-10-08 Globalfoundries Inc. Arc-resistant crackstop
JP7087336B2 (ja) * 2017-10-13 2022-06-21 株式会社デンソー 半導体装置
US11296031B2 (en) 2018-03-30 2022-04-05 Intel Corporation Dielectric-filled trench isolation of vias
JP7039411B2 (ja) 2018-07-20 2022-03-22 株式会社東芝 光検出器、光検出システム、ライダー装置及び車
DE102019117707B4 (de) * 2019-07-01 2021-12-30 RF360 Europe GmbH Halbleiter-Die und Antennentuner
JP7222851B2 (ja) 2019-08-29 2023-02-15 株式会社東芝 光検出器、光検出システム、ライダー装置、及び車
JP7153001B2 (ja) 2019-09-18 2022-10-13 株式会社東芝 光検出器、光検出システム、ライダー装置、及び車

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US4980747A (en) * 1986-12-22 1990-12-25 Texas Instruments Inc. Deep trench isolation with surface contact to substrate
US4819052A (en) * 1986-12-22 1989-04-04 Texas Instruments Incorporated Merged bipolar/CMOS technology using electrically active trench
JPH02271567A (ja) * 1989-04-12 1990-11-06 Takehide Shirato 半導体装置
US5241211A (en) * 1989-12-20 1993-08-31 Nec Corporation Semiconductor device
US5264387A (en) * 1992-10-27 1993-11-23 International Business Machines Corporation Method of forming uniformly thin, isolated silicon mesas on an insulating substrate
KR950021600A (ko) * 1993-12-09 1995-07-26 가나이 쯔또무 반도체 집적회로장치 및 그 제조방법
JP3159237B2 (ja) * 1996-06-03 2001-04-23 日本電気株式会社 半導体装置およびその製造方法
JP3077592B2 (ja) * 1996-06-27 2000-08-14 日本電気株式会社 デジタル回路とアナログ回路が混在する半導体集積回路装置およびその製造方法
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US6355537B1 (en) * 1999-02-23 2002-03-12 Silicon Wave, Inc. Method of providing radio frequency isolation of device mesas using guard ring regions within an integrated circuit device
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JP2001044277A (ja) * 1999-08-02 2001-02-16 Nippon Telegr & Teleph Corp <Ntt> 半導体基板および半導体装置
JP2001345428A (ja) * 2000-03-27 2001-12-14 Toshiba Corp 半導体装置とその製造方法
US6429502B1 (en) * 2000-08-22 2002-08-06 Silicon Wave, Inc. Multi-chambered trench isolated guard ring region for providing RF isolation
JP2002110990A (ja) * 2000-09-27 2002-04-12 Toshiba Corp 半導体装置およびその製造方法
US6563181B1 (en) * 2001-11-02 2003-05-13 Motorola, Inc. High frequency signal isolation in a semiconductor device
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JP2004153175A (ja) * 2002-10-31 2004-05-27 Nec Electronics Corp 半導体集積回路及びその半導体基板
JP2004207271A (ja) * 2002-12-20 2004-07-22 Nec Electronics Corp Ｓｏｉ基板及び半導体集積回路装置
US7851860B2 (en) * 2004-03-26 2010-12-14 Honeywell International Inc. Techniques to reduce substrate cross talk on mixed signal and RF circuit design

Also Published As

Publication number Publication date
JP5209301B2 (ja) 2013-06-12
WO2005098937A1 (en) 2005-10-20
US7851860B2 (en) 2010-12-14
TW200612518A (en) 2006-04-16
US20050212071A1 (en) 2005-09-29
JP2007531281A (ja) 2007-11-01
EP1728275A1 (en) 2006-12-06
US8058689B2 (en) 2011-11-15
US20110045652A1 (en) 2011-02-24
TWI364091B (en) 2012-05-11
EP1728275B1 (en) 2011-03-16

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