DE602005020713D1 - Hochgeschwindigkeits-Flipflopschaltung - Google Patents

Hochgeschwindigkeits-Flipflopschaltung

Info

Publication number
DE602005020713D1
DE602005020713D1 DE602005020713T DE602005020713T DE602005020713D1 DE 602005020713 D1 DE602005020713 D1 DE 602005020713D1 DE 602005020713 T DE602005020713 T DE 602005020713T DE 602005020713 T DE602005020713 T DE 602005020713T DE 602005020713 D1 DE602005020713 D1 DE 602005020713D1
Authority
DE
Germany
Prior art keywords
flop circuit
speed flip
flip
speed
flop
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602005020713T
Other languages
English (en)
Inventor
Kouichi Kanda
Satoshi Matsubara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Publication of DE602005020713D1 publication Critical patent/DE602005020713D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/02Generators characterised by the type of circuit or by the means used for producing pulses
    • H03K3/353Generators characterised by the type of circuit or by the means used for producing pulses by the use, as active elements, of field-effect transistors with internal or external positive feedback
    • H03K3/356Bistable circuits
    • H03K3/356104Bistable circuits using complementary field-effect transistors
    • H03K3/356113Bistable circuits using complementary field-effect transistors using additional transistors in the input circuit
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K3/00Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/01Details
    • H03K3/012Modifications of generator to improve response time or to decrease power consumption
DE602005020713T 2004-04-30 2005-02-24 Hochgeschwindigkeits-Flipflopschaltung Active DE602005020713D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2004136784A JP4205628B2 (ja) 2004-04-30 2004-04-30 高速フリップフロップ回路

Publications (1)

Publication Number Publication Date
DE602005020713D1 true DE602005020713D1 (de) 2010-06-02

Family

ID=34940510

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602005020713T Active DE602005020713D1 (de) 2004-04-30 2005-02-24 Hochgeschwindigkeits-Flipflopschaltung

Country Status (4)

Country Link
US (1) US7583123B2 (de)
EP (1) EP1601102B1 (de)
JP (1) JP4205628B2 (de)
DE (1) DE602005020713D1 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1801969A1 (de) * 2005-12-23 2007-06-27 Infineon Technologies AG Echte Einphasentakt Flipflopschaltung
DE102005063097B4 (de) * 2005-12-30 2014-09-04 Infineon Technologies Ag Gepulstes statisches Flip-Flop
JP2007235739A (ja) * 2006-03-02 2007-09-13 Sony Corp ダイナミック型フリップフロップ回路
JP2009089391A (ja) 2007-09-28 2009-04-23 Hynix Semiconductor Inc フリップフロップ及びこれを用いたデューティ比補正回路
JP4539732B2 (ja) * 2008-02-28 2010-09-08 ソニー株式会社 フリップフロップ回路
US7973581B2 (en) 2008-02-28 2011-07-05 Sony Corporation Phase detector, phase comparator, and clock synchronizing device
JP5807333B2 (ja) * 2011-01-27 2015-11-10 ソニー株式会社 ディレイラッチ回路、および、ディレイフリップフロップ
US8421514B1 (en) 2011-03-31 2013-04-16 Applied Micro Circuits Corporation Hazard-free minimal-latency flip-flop (HFML-FF)
JP2014060669A (ja) 2012-09-19 2014-04-03 Fujitsu Ltd マスタスレーブ型フリップフロップ回路
US9924466B1 (en) * 2015-05-11 2018-03-20 Cadence Design Systems, Inc. Dynamic flip-flop and multiplexer for sub-rate clock data serializer
US10033386B2 (en) 2015-09-01 2018-07-24 Samsung Electronics Co., Ltd. Semiconductor circuits
US9722611B2 (en) 2015-09-01 2017-08-01 Samsung Electronics Co., Ltd. Semiconductor circuits
JP6828330B2 (ja) * 2016-09-09 2021-02-10 富士通株式会社 フリップフロップ回路および半導体集積回路装置
CN109639268B (zh) * 2018-11-20 2023-05-05 珠海市杰理科技股份有限公司 D触发器及鉴频鉴相器电路
US10826469B2 (en) * 2019-02-21 2020-11-03 Synopsys, Inc. High performance and low power TSPC latch with data agnostic setup and hold time
JP2021097317A (ja) * 2019-12-17 2021-06-24 セイコーエプソン株式会社 フリップフロップ回路および発振器
TWI756964B (zh) 2020-12-03 2022-03-01 智原科技股份有限公司 D型正反器
US11095275B1 (en) * 2021-02-01 2021-08-17 Shenzhen GOODIX Technology Co., Ltd. Loadable true-single-phase-clocking flop
EP4203316A4 (de) 2021-03-09 2024-08-14 Changxin Memory Tech Inc Signalausgabeschaltung und verzögerungssignalausgabeschaltung
EP4203319A1 (de) * 2021-03-09 2023-06-28 Changxin Memory Technologies, Inc. Verschachtelte signalerzeugungsschaltung
US11349483B1 (en) * 2021-08-02 2022-05-31 Qualcomm Incorporated Prescaler for a frequency divider

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03228296A (ja) 1990-02-01 1991-10-09 Nec Corp 半導体集積回路装置
JPH04159808A (ja) 1990-10-24 1992-06-03 Hitachi Ltd エッジトリガ型フリップフロップ回路
JPH04290303A (ja) 1991-03-19 1992-10-14 Nec Corp ラッチ回路
JPH05122024A (ja) 1991-10-24 1993-05-18 Hitachi Ltd ダイナミツク形ラツチ回路
JPH08256044A (ja) 1995-03-16 1996-10-01 Nippon Telegr & Teleph Corp <Ntt> 記憶回路およびフリップフロップ回路
US5933038A (en) * 1997-02-25 1999-08-03 Sun Microsystems, Inc. Flip-flop with logic function incorporated therein with minimal time penalty
US5898330A (en) * 1997-06-03 1999-04-27 Sun Microsystems, Inc. Edge-triggered staticized dynamic flip-flop with scan circuitry
DE19749521C2 (de) 1997-11-08 1999-09-02 Temic Semiconductor Gmbh Bistabile Kippstufe
KR100280447B1 (ko) * 1998-03-02 2001-02-01 김영환 디지털지연동기루프회로
US6181180B1 (en) * 1999-06-28 2001-01-30 Intel Corporation Flip-flop circuit
US6377097B1 (en) * 2000-03-13 2002-04-23 The United States Of America As Represented By The Administrator Of The National Aeronautics And Space Administration Method and apparatus for reducing the vulnerability of latches to single event upsets
JP2002026697A (ja) 2000-07-13 2002-01-25 Matsushita Electric Ind Co Ltd フリップフロップ回路
JP2002208841A (ja) 2001-01-11 2002-07-26 Seiko Instruments Inc ダイナミックフリップフロップ
US6445217B1 (en) * 2001-03-15 2002-09-03 International Business Machines Corporation Edge-triggered latch with balanced pass-transistor logic trigger
US6646487B2 (en) * 2001-09-17 2003-11-11 Fujitsu Limited Method and system for reducing hazards in a flip-flop
KR100416379B1 (ko) * 2001-09-24 2004-01-31 삼성전자주식회사 고속 방전-억제 디 플립플롭
CN1268057C (zh) * 2002-10-18 2006-08-02 松下电器产业株式会社 触发器电路
US6972605B1 (en) * 2004-03-25 2005-12-06 Sun Microsystems, Inc. High speed semi-dynamic flip-flop circuit

Also Published As

Publication number Publication date
JP4205628B2 (ja) 2009-01-07
EP1601102A1 (de) 2005-11-30
US20050242861A1 (en) 2005-11-03
EP1601102B1 (de) 2010-04-21
US7583123B2 (en) 2009-09-01
JP2005318479A (ja) 2005-11-10

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Legal Events

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Representative=s name: SEEGER SEEGER LINDNER PARTNERSCHAFT PATENTANWAELTE

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