DE602004016280D1 - Nichtflüchtige Speicherzelle und Betriebsverfahren hierfür - Google Patents

Nichtflüchtige Speicherzelle und Betriebsverfahren hierfür

Info

Publication number
DE602004016280D1
DE602004016280D1 DE602004016280T DE602004016280T DE602004016280D1 DE 602004016280 D1 DE602004016280 D1 DE 602004016280D1 DE 602004016280 T DE602004016280 T DE 602004016280T DE 602004016280 T DE602004016280 T DE 602004016280T DE 602004016280 D1 DE602004016280 D1 DE 602004016280D1
Authority
DE
Germany
Prior art keywords
memory cell
volatile memory
operating method
method therefor
therefor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
DE602004016280T
Other languages
English (en)
Inventor
Yeh Chih-Chieh
Chen Hung-Yueh
Liao Li-Ying
Tsai Wen-Jer
Lu Tao-Cheng
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Macronix International Co Ltd
Original Assignee
Macronix International Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Macronix International Co Ltd filed Critical Macronix International Co Ltd
Publication of DE602004016280D1 publication Critical patent/DE602004016280D1/de
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0466—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS]
    • G11C16/0475—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells with charge storage in an insulating layer, e.g. metal-nitride-oxide-silicon [MNOS], silicon-oxide-nitride-oxide-silicon [SONOS] comprising two or more independent storage sites which store independent data
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/401—Multistep manufacturing processes
    • H01L29/4011—Multistep manufacturing processes for data storage electrodes
    • H01L29/40117—Multistep manufacturing processes for data storage electrodes the electrodes comprising a charge-trapping insulator
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66833—Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a charge trapping gate insulator, e.g. MNOS transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
    • H01L29/7923—Programmable transistors with more than two possible different levels of programmation

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
DE602004016280T 2004-01-14 2004-10-06 Nichtflüchtige Speicherzelle und Betriebsverfahren hierfür Active DE602004016280D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/756,777 US7057938B2 (en) 2002-03-29 2004-01-14 Nonvolatile memory cell and operating method

Publications (1)

Publication Number Publication Date
DE602004016280D1 true DE602004016280D1 (de) 2008-10-16

Family

ID=34620675

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004016280T Active DE602004016280D1 (de) 2004-01-14 2004-10-06 Nichtflüchtige Speicherzelle und Betriebsverfahren hierfür

Country Status (6)

Country Link
US (1) US7057938B2 (de)
EP (1) EP1555674B1 (de)
JP (1) JP2005203739A (de)
CN (1) CN100379028C (de)
DE (1) DE602004016280D1 (de)
TW (1) TWI260767B (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7324377B2 (en) * 2004-10-29 2008-01-29 Macronix International Co., Ltd. Apparatus and method for programming and erasing virtual ground EEPROM without disturbing adjacent cells
US7602009B2 (en) * 2005-06-16 2009-10-13 Micron Technology, Inc. Erasable non-volatile memory device using hole trapping in high-K dielectrics
US7224619B2 (en) * 2005-09-09 2007-05-29 Macronix International Co., Ltd. Method and apparatus for protection from over-erasing nonvolatile memory cells
US7710774B2 (en) * 2005-11-23 2010-05-04 Macronix International Co., Ltd. NAND type multi-bit charge storage memory array and methods for operating and fabricating the same
US7746694B2 (en) 2006-07-10 2010-06-29 Macronix International Co., Ltd. Nonvolatile memory array having modified channel region interface
US7916550B2 (en) * 2006-11-17 2011-03-29 Macronix International Co., Ltd. Method and apparatus for operating nonvolatile memory with floating voltage at one of the source and drain regions
US7443753B2 (en) * 2006-11-21 2008-10-28 Macronix International Co., Ltd. Memory structure, programming method and reading method therefor, and memory control circuit thereof
CN101197196A (zh) * 2006-12-05 2008-06-11 中芯国际集成电路制造(上海)有限公司 检验闪存单元电性能的方法
JP2008217972A (ja) * 2007-02-28 2008-09-18 Samsung Electronics Co Ltd 不揮発性メモリ素子の作動方法
US7974127B2 (en) * 2007-11-06 2011-07-05 Macronix International Co., Ltd. Operation methods for memory cell and array for reducing punch through leakage
EP2075798A1 (de) * 2007-12-25 2009-07-01 TPO Displays Corp. Speicherdateneinheit basierend auf durch heisse Ladungsträger hervorgerufenen Stress
CN102169724B (zh) * 2010-02-26 2014-09-24 宏碁股份有限公司 存储器元件的操作方法
US9559113B2 (en) 2014-05-01 2017-01-31 Macronix International Co., Ltd. SSL/GSL gate oxide in 3D vertical channel NAND

Family Cites Families (22)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4004159A (en) * 1973-05-18 1977-01-18 Sanyo Electric Co., Ltd. Electrically reprogrammable nonvolatile floating gate semi-conductor memory device and method of operation
US5163022A (en) 1989-01-23 1992-11-10 Hitachi, Ltd. Semiconductor cell memory with current sensing
US5396459A (en) * 1992-02-24 1995-03-07 Sony Corporation Single transistor flash electrically programmable memory cell in which a negative voltage is applied to the nonselected word line
JP3132637B2 (ja) * 1995-06-29 2001-02-05 日本電気株式会社 不揮発性半導体記憶装置
US5768192A (en) 1996-07-23 1998-06-16 Saifun Semiconductors, Ltd. Non-volatile semiconductor memory cell utilizing asymmetrical charge trapping
JP4244074B2 (ja) * 1997-03-19 2009-03-25 シチズンホールディングス株式会社 Ｍｏｎｏｓ型半導体不揮発性メモリトランジスタの製造方法
US6252799B1 (en) * 1997-04-11 2001-06-26 Programmable Silicon Solutions Device with embedded flash and EEPROM memories
JP3558510B2 (ja) * 1997-10-30 2004-08-25 シャープ株式会社 不揮発性半導体記憶装置
US5986942A (en) 1998-01-20 1999-11-16 Nec Corporation Semiconductor memory device
JP3549723B2 (ja) * 1998-03-27 2004-08-04 富士通株式会社 半導体記憶装置
US6348711B1 (en) 1998-05-20 2002-02-19 Saifun Semiconductors Ltd. NROM cell with self-aligned programming and erasure areas
US6469935B2 (en) 1999-08-05 2002-10-22 Halo Lsi Design & Device Technology, Inc. Array architecture nonvolatile memory and its operation methods
JP4923318B2 (ja) * 1999-12-17 2012-04-25 ソニー株式会社 不揮発性半導体記憶装置およびその動作方法
JP4834897B2 (ja) * 2000-05-02 2011-12-14 ソニー株式会社 不揮発性半導体記憶装置およびその動作方法
JP4058232B2 (ja) 2000-11-29 2008-03-05 株式会社ルネサステクノロジ 半導体装置及びｉｃカード
KR100629193B1 (ko) * 2001-05-25 2006-09-28 후지쯔 가부시끼가이샤 불휘발성 반도체 기억 장치 및 그의 기록 방법
JP2003007099A (ja) * 2001-06-22 2003-01-10 Matsushita Electric Ind Co Ltd 不揮発性半導体記憶装置とその検査方法
US6670240B2 (en) * 2001-08-13 2003-12-30 Halo Lsi, Inc. Twin NAND device structure, array operations and fabrication method
US6690601B2 (en) * 2002-03-29 2004-02-10 Macronix International Co., Ltd. Nonvolatile semiconductor memory cell with electron-trapping erase state and methods for operating the same
JP4647175B2 (ja) * 2002-04-18 2011-03-09 ルネサスエレクトロニクス株式会社 半導体集積回路装置
JP2003346484A (ja) * 2002-05-23 2003-12-05 Mitsubishi Electric Corp 不揮発性半導体記憶装置
US6791883B2 (en) 2002-06-24 2004-09-14 Freescale Semiconductor, Inc. Program and erase in a thin film storage non-volatile memory

Also Published As

Publication number Publication date
CN100379028C (zh) 2008-04-02
EP1555674B1 (de) 2008-09-03
US20040145950A1 (en) 2004-07-29
CN1655360A (zh) 2005-08-17
EP1555674A1 (de) 2005-07-20
TW200524145A (en) 2005-07-16
JP2005203739A (ja) 2005-07-28
US7057938B2 (en) 2006-06-06
TWI260767B (en) 2006-08-21

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