DE602004015592D1 - Methode zur herstellung von finfets mit mehreren höhen - Google Patents

Methode zur herstellung von finfets mit mehreren höhen

Info

Publication number
DE602004015592D1
DE602004015592D1 DE602004015592T DE602004015592T DE602004015592D1 DE 602004015592 D1 DE602004015592 D1 DE 602004015592D1 DE 602004015592 T DE602004015592 T DE 602004015592T DE 602004015592 T DE602004015592 T DE 602004015592T DE 602004015592 D1 DE602004015592 D1 DE 602004015592D1
Authority
DE
Germany
Prior art keywords
fin
fins
ratio
channel region
finfets
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004015592T
Other languages
English (en)
Inventor
Beth Ann Rainey
Edward J Nowak
Ingo Dr Aller
Joachim Keinert
Thomas Ludwig
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE602004015592D1 publication Critical patent/DE602004015592D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/62Fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01Manufacture or treatment
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/201Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/40Crystalline structures
    • H10D62/405Orientations of crystalline planes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
DE602004015592T 2003-05-05 2004-01-30 Methode zur herstellung von finfets mit mehreren höhen Expired - Lifetime DE602004015592D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/249,738 US6909147B2 (en) 2003-05-05 2003-05-05 Multi-height FinFETS
PCT/US2004/002647 WO2004100290A2 (en) 2003-05-05 2004-01-30 Multi-height finfets

Publications (1)

Publication Number Publication Date
DE602004015592D1 true DE602004015592D1 (de) 2008-09-18

Family

ID=33415537

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004015592T Expired - Lifetime DE602004015592D1 (de) 2003-05-05 2004-01-30 Methode zur herstellung von finfets mit mehreren höhen

Country Status (8)

Country Link
US (1) US6909147B2 (de)
EP (1) EP1620891B1 (de)
KR (1) KR100690559B1 (de)
CN (1) CN100466229C (de)
AT (1) ATE403937T1 (de)
DE (1) DE602004015592D1 (de)
TW (1) TWI289354B (de)
WO (1) WO2004100290A2 (de)

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Also Published As

Publication number Publication date
EP1620891A4 (de) 2007-03-28
WO2004100290A3 (en) 2005-02-24
KR100690559B1 (ko) 2007-03-12
EP1620891A2 (de) 2006-02-01
US6909147B2 (en) 2005-06-21
EP1620891B1 (de) 2008-08-06
US20040222477A1 (en) 2004-11-11
CN1784782A (zh) 2006-06-07
TWI289354B (en) 2007-11-01
ATE403937T1 (de) 2008-08-15
KR20060004659A (ko) 2006-01-12
WO2004100290A2 (en) 2004-11-18
TW200507265A (en) 2005-02-16
CN100466229C (zh) 2009-03-04

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