ATE461526T1 - Hochdichtes finfet-integrationsverfahren - Google Patents
Hochdichtes finfet-integrationsverfahrenInfo
- Publication number
- ATE461526T1 ATE461526T1 AT04777137T AT04777137T ATE461526T1 AT E461526 T1 ATE461526 T1 AT E461526T1 AT 04777137 T AT04777137 T AT 04777137T AT 04777137 T AT04777137 T AT 04777137T AT E461526 T1 ATE461526 T1 AT E461526T1
- Authority
- AT
- Austria
- Prior art keywords
- fin
- channel region
- high density
- integration process
- density finfet
- Prior art date
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P10/00—Bonding of wafers, substrates or parts of devices
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/01—Manufacture or treatment
- H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
- H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/62—Fin field-effect transistors [FinFET]
Landscapes
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Electrodes Of Semiconductors (AREA)
- Bipolar Transistors (AREA)
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/604,077 US6894326B2 (en) | 2003-06-25 | 2003-06-25 | High-density finFET integration scheme |
| PCT/US2004/020553 WO2005001905A2 (en) | 2003-06-25 | 2004-06-25 | High-density finfet integration scheme |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| ATE461526T1 true ATE461526T1 (de) | 2010-04-15 |
Family
ID=33539877
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| AT04777137T ATE461526T1 (de) | 2003-06-25 | 2004-06-25 | Hochdichtes finfet-integrationsverfahren |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US6894326B2 (de) |
| EP (1) | EP1644988B1 (de) |
| KR (1) | KR100734997B1 (de) |
| CN (1) | CN100492666C (de) |
| AT (1) | ATE461526T1 (de) |
| DE (1) | DE602004026063D1 (de) |
| WO (1) | WO2005001905A2 (de) |
Families Citing this family (44)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7253650B2 (en) * | 2004-05-25 | 2007-08-07 | International Business Machines Corporation | Increase productivity at wafer test using probe retest data analysis |
| US7183142B2 (en) * | 2005-01-13 | 2007-02-27 | International Business Machines Corporation | FinFETs with long gate length at high density |
| US7316148B2 (en) * | 2005-02-15 | 2008-01-08 | Boston Scientific Scimed, Inc. | Protective sheet loader |
| US7265013B2 (en) * | 2005-09-19 | 2007-09-04 | International Business Machines Corporation | Sidewall image transfer (SIT) technologies |
| CN100449783C (zh) * | 2005-11-29 | 2009-01-07 | 台湾积体电路制造股份有限公司 | 具有体接触窗的鳍状场效应晶体管及其制造方法 |
| US7754560B2 (en) * | 2006-01-10 | 2010-07-13 | Freescale Semiconductor, Inc. | Integrated circuit using FinFETs and having a static random access memory (SRAM) |
| US7723805B2 (en) * | 2006-01-10 | 2010-05-25 | Freescale Semiconductor, Inc. | Electronic device including a fin-type transistor structure and a process for forming the electronic device |
| US7709303B2 (en) * | 2006-01-10 | 2010-05-04 | Freescale Semiconductor, Inc. | Process for forming an electronic device including a fin-type structure |
| US7301210B2 (en) * | 2006-01-12 | 2007-11-27 | International Business Machines Corporation | Method and structure to process thick and thin fins and variable fin to fin spacing |
| US7560798B2 (en) * | 2006-02-27 | 2009-07-14 | International Business Machines Corporation | High performance tapered varactor |
| KR100838378B1 (ko) * | 2006-09-29 | 2008-06-13 | 주식회사 하이닉스반도체 | 핀트랜지스터의 제조 방법 |
| JP5525127B2 (ja) * | 2007-11-12 | 2014-06-18 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置及びその製造方法 |
| US7927938B2 (en) * | 2007-11-19 | 2011-04-19 | Micron Technology, Inc. | Fin-JFET |
| US7829951B2 (en) * | 2008-11-06 | 2010-11-09 | Qualcomm Incorporated | Method of fabricating a fin field effect transistor (FinFET) device |
| EP2362817A4 (de) * | 2008-11-25 | 2017-09-06 | Justin V. Page | Schweissgerät und schweissverfahren |
| US8633076B2 (en) * | 2010-11-23 | 2014-01-21 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method for adjusting fin width in integrated circuitry |
| US8513131B2 (en) | 2011-03-17 | 2013-08-20 | International Business Machines Corporation | Fin field effect transistor with variable channel thickness for threshold voltage tuning |
| US8586482B2 (en) | 2011-06-29 | 2013-11-19 | International Business Machines Corporation | Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation |
| US8580692B2 (en) | 2011-06-29 | 2013-11-12 | International Business Machines Corporation | Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation |
| US8637930B2 (en) * | 2011-10-13 | 2014-01-28 | International Business Machines Company | FinFET parasitic capacitance reduction using air gap |
| US8569125B2 (en) | 2011-11-30 | 2013-10-29 | International Business Machines Corporation | FinFET with improved gate planarity |
| US8569152B1 (en) | 2012-06-04 | 2013-10-29 | International Business Machines Corporation | Cut-very-last dual-epi flow |
| US8697515B2 (en) * | 2012-06-06 | 2014-04-15 | Taiwan Semiconductor Manufacturing Company, Ltd. | Method of making a FinFET device |
| US8617961B1 (en) * | 2012-07-18 | 2013-12-31 | International Business Machines Corporation | Post-gate isolation area formation for fin field effect transistor device |
| US8741701B2 (en) | 2012-08-14 | 2014-06-03 | International Business Machines Corporation | Fin structure formation including partial spacer removal |
| US9142548B2 (en) * | 2012-09-04 | 2015-09-22 | Qualcomm Incorporated | FinFET compatible capacitor circuit |
| US20140167162A1 (en) | 2012-12-13 | 2014-06-19 | International Business Machines Corporation | Finfet with merge-free fins |
| US8813016B1 (en) * | 2013-01-28 | 2014-08-19 | Taiwan Semiconductor Manufacturing Company Limited | Multiple via connections using connectivity rings |
| US9006087B2 (en) | 2013-02-07 | 2015-04-14 | International Business Machines Corporation | Diode structure and method for wire-last nanomesh technologies |
| US8927397B2 (en) | 2013-02-07 | 2015-01-06 | International Business Machines Corporation | Diode structure and method for gate all around silicon nanowire technologies |
| US9190419B2 (en) | 2013-02-07 | 2015-11-17 | International Business Machines Corporation | Diode structure and method for FINFET technologies |
| US9704880B2 (en) * | 2013-11-06 | 2017-07-11 | Taiwan Semiconductor Manufacturing Company Limited | Systems and methods for a semiconductor structure having multiple semiconductor-device layers |
| US9224654B2 (en) | 2013-11-25 | 2015-12-29 | International Business Machines Corporation | Fin capacitor employing sidewall image transfer |
| US9633906B2 (en) | 2014-01-24 | 2017-04-25 | International Business Machines Corporation | Gate structure cut after formation of epitaxial active regions |
| US9252243B2 (en) | 2014-02-07 | 2016-02-02 | International Business Machines Corporation | Gate structure integration scheme for fin field effect transistors |
| US10475886B2 (en) | 2014-12-16 | 2019-11-12 | International Business Machines Corporation | Modified fin cut after epitaxial growth |
| US10381465B2 (en) | 2015-04-21 | 2019-08-13 | Varian Semiconductor Equipment Associates, Inc. | Method for fabricating asymmetrical three dimensional device |
| US9748364B2 (en) * | 2015-04-21 | 2017-08-29 | Varian Semiconductor Equipment Associates, Inc. | Method for fabricating three dimensional device |
| EP3136446A1 (de) | 2015-08-28 | 2017-03-01 | Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO | Tft-vorrichtung und herstellungsverfahren |
| US9768272B2 (en) | 2015-09-30 | 2017-09-19 | International Business Machines Corporation | Replacement gate FinFET process using a sit process to define source/drain regions, gate spacers and a gate cavity |
| US9530890B1 (en) | 2015-11-02 | 2016-12-27 | International Business Machines Corporation | Parasitic capacitance reduction |
| US9966338B1 (en) * | 2017-04-18 | 2018-05-08 | Globalfoundries Inc. | Pre-spacer self-aligned cut formation |
| US10276718B2 (en) * | 2017-08-31 | 2019-04-30 | Taiwan Semiconductor Manufacturing Co., Ltd. | FinFET having a relaxation prevention anchor |
| CN115188772B (zh) * | 2022-07-15 | 2025-03-11 | 京东方科技集团股份有限公司 | 显示面板、显示装置 |
Family Cites Families (25)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0214578A (ja) | 1988-07-01 | 1990-01-18 | Fujitsu Ltd | 半導体装置 |
| US5391506A (en) | 1992-01-31 | 1995-02-21 | Kawasaki Steel Corporation | Manufacturing method for semiconductor devices with source/drain formed in substrate projection. |
| JPH09293793A (ja) * | 1996-04-26 | 1997-11-11 | Mitsubishi Electric Corp | 薄膜トランジスタを有する半導体装置およびその製造方法 |
| FR2799305B1 (fr) | 1999-10-05 | 2004-06-18 | St Microelectronics Sa | Procede de fabrication d'un dispositif semi-conducteur a grille enveloppante et dispositif obtenu |
| US6355532B1 (en) | 1999-10-06 | 2002-03-12 | Lsi Logic Corporation | Subtractive oxidation method of fabricating a short-length and vertically-oriented channel, dual-gate, CMOS FET |
| US6252284B1 (en) | 1999-12-09 | 2001-06-26 | International Business Machines Corporation | Planarized silicon fin device |
| US6483156B1 (en) | 2000-03-16 | 2002-11-19 | International Business Machines Corporation | Double planar gated SOI MOSFET structure |
| US20020062170A1 (en) * | 2000-06-28 | 2002-05-23 | Skunes Timothy A. | Automated opto-electronic assembly machine and method |
| JP4044276B2 (ja) * | 2000-09-28 | 2008-02-06 | 株式会社東芝 | 半導体装置及びその製造方法 |
| US7163864B1 (en) * | 2000-10-18 | 2007-01-16 | International Business Machines Corporation | Method of fabricating semiconductor side wall fin |
| US6413802B1 (en) * | 2000-10-23 | 2002-07-02 | The Regents Of The University Of California | Finfet transistor structures having a double gate channel extending vertically from a substrate and methods of manufacture |
| US6580150B1 (en) * | 2000-11-13 | 2003-06-17 | Vram Technologies, Llc | Vertical junction field effect semiconductor diodes |
| US6475869B1 (en) | 2001-02-26 | 2002-11-05 | Advanced Micro Devices, Inc. | Method of forming a double gate transistor having an epitaxial silicon/germanium channel region |
| US6458662B1 (en) | 2001-04-04 | 2002-10-01 | Advanced Micro Devices, Inc. | Method of fabricating a semiconductor device having an asymmetrical dual-gate silicon-germanium (SiGe) channel MOSFET and a device thereby formed |
| US6492212B1 (en) | 2001-10-05 | 2002-12-10 | International Business Machines Corporation | Variable threshold voltage double gated transistors and method of fabrication |
| US6433609B1 (en) * | 2001-11-19 | 2002-08-13 | International Business Machines Corporation | Double-gate low power SOI active clamp network for single power supply and multiple power supply applications |
| US6657252B2 (en) * | 2002-03-19 | 2003-12-02 | International Business Machines Corporation | FinFET CMOS with NVRAM capability |
| US6635909B2 (en) * | 2002-03-19 | 2003-10-21 | International Business Machines Corporation | Strained fin FETs structure and method |
| US6995412B2 (en) * | 2002-04-12 | 2006-02-07 | International Business Machines Corporation | Integrated circuit with capacitors having a fin structure |
| US6664582B2 (en) * | 2002-04-12 | 2003-12-16 | International Business Machines Corporation | Fin memory cell and method of fabrication |
| US6833556B2 (en) * | 2002-08-12 | 2004-12-21 | Acorn Technologies, Inc. | Insulated gate field effect transistor having passivated schottky barriers to the channel |
| US6770516B2 (en) * | 2002-09-05 | 2004-08-03 | Taiwan Semiconductor Manufacturing Company | Method of forming an N channel and P channel FINFET device on the same semiconductor substrate |
| US6706571B1 (en) * | 2002-10-22 | 2004-03-16 | Advanced Micro Devices, Inc. | Method for forming multiple structures in a semiconductor device |
| US7214991B2 (en) * | 2002-12-06 | 2007-05-08 | Taiwan Semiconductor Manufacturing Co., Ltd. | CMOS inverters configured using multiple-gate transistors |
| US6909147B2 (en) * | 2003-05-05 | 2005-06-21 | International Business Machines Corporation | Multi-height FinFETS |
-
2003
- 2003-06-25 US US10/604,077 patent/US6894326B2/en not_active Expired - Fee Related
-
2004
- 2004-06-25 AT AT04777137T patent/ATE461526T1/de not_active IP Right Cessation
- 2004-06-25 CN CNB2004800241873A patent/CN100492666C/zh not_active Expired - Lifetime
- 2004-06-25 DE DE602004026063T patent/DE602004026063D1/de not_active Expired - Lifetime
- 2004-06-25 WO PCT/US2004/020553 patent/WO2005001905A2/en not_active Ceased
- 2004-06-25 EP EP04777137A patent/EP1644988B1/de not_active Expired - Lifetime
- 2004-06-25 KR KR1020057022470A patent/KR100734997B1/ko not_active Expired - Fee Related
- 2004-11-09 US US10/984,578 patent/US6987289B2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| CN1839483A (zh) | 2006-09-27 |
| DE602004026063D1 (de) | 2010-04-29 |
| KR100734997B1 (ko) | 2007-07-04 |
| US6987289B2 (en) | 2006-01-17 |
| WO2005001905A2 (en) | 2005-01-06 |
| EP1644988A2 (de) | 2006-04-12 |
| KR20060009015A (ko) | 2006-01-27 |
| WO2005001905A3 (en) | 2006-02-23 |
| EP1644988B1 (de) | 2010-03-17 |
| EP1644988A4 (de) | 2007-04-11 |
| US20040262698A1 (en) | 2004-12-30 |
| CN100492666C (zh) | 2009-05-27 |
| US20050082578A1 (en) | 2005-04-21 |
| US6894326B2 (en) | 2005-05-17 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| ATE461526T1 (de) | Hochdichtes finfet-integrationsverfahren | |
| ATE404996T1 (de) | Verfahren zur herstellung von paaren paralleler finfets | |
| TW200511583A (en) | Strained-channel fin field effect transistor (FET) with a uniform channel thickness and separate gates | |
| DE602004015592D1 (de) | Methode zur herstellung von finfets mit mehreren höhen | |
| EP1542270A4 (de) | Vertikal-sperrschichtfeldeffekttransistor und verfahren zu seiner herstellung | |
| WO2005089440A3 (en) | Multiple dielectric finfet structure and method | |
| DE602006008017D1 (de) | Hochleistungsfähiger mosfet mit einer verspannten gate-metallsilizidschicht und herstellungsverfahren dafür | |
| WO2006072575A3 (en) | Ldmos transistor | |
| ATE544182T1 (de) | Feldeffekttransistor des fin-typs | |
| TW200715562A (en) | Thin film transistor substrate and fabrication thereof | |
| TW200507255A (en) | Semiconductor device and method of fabricating the same | |
| WO2007082266A3 (en) | Semiconductor transistors with expanded top portions of gates | |
| EP1555688A3 (de) | Ein FinFET mit mehrseitigem Kanal und zugehöriges Herstellungsverfahren. | |
| TW200605349A (en) | Nitride-based transistors having laterally grown active region and methods of fabricating same | |
| TW200625634A (en) | Transistor with strained region and method of manufacture | |
| WO2006012626A3 (en) | Memory devices, transistors, memory cells, and methods of making same | |
| TW200631065A (en) | Strained transistor with hybrid-strain inducing layer | |
| WO2003015182A3 (de) | Steg-feldeffekttransistor und verfahren zum herstellen eines steg-feldeffekttransistors | |
| SG143938A1 (en) | Accumulation mode multiple gate transistor | |
| WO2007110507A3 (fr) | Procede de realisation d'un transistor a effet de champ a grilles auto-alignees | |
| WO2009031076A3 (en) | A transistor and a method of manufacturing the same | |
| WO2007078957A3 (en) | Method and structure for reducing the external resistance of a three-dimensional transistor through use of epitaxial layers | |
| TW200620479A (en) | MOSFET device with localized stressor | |
| TW200721510A (en) | Finfet-based non-volatile memory device and method of manufacturing such a memory device | |
| DE60239209D1 (de) | Herstellungsverfahren für feldeffekttransistor mit selbstjustierten horizontalen gates |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| RER | Ceased as to paragraph 5 lit. 3 law introducing patent treaties |