DE602004026063D1 - Hochdichtes finfet-integrationsverfahren - Google Patents

Hochdichtes finfet-integrationsverfahren

Info

Publication number
DE602004026063D1
DE602004026063D1 DE602004026063T DE602004026063T DE602004026063D1 DE 602004026063 D1 DE602004026063 D1 DE 602004026063D1 DE 602004026063 T DE602004026063 T DE 602004026063T DE 602004026063 T DE602004026063 T DE 602004026063T DE 602004026063 D1 DE602004026063 D1 DE 602004026063D1
Authority
DE
Germany
Prior art keywords
fin
channel region
high density
integration process
density finfet
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004026063T
Other languages
English (en)
Inventor
Edward J Nowak
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of DE602004026063D1 publication Critical patent/DE602004026063D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/785Field effect transistors with field effect produced by an insulated gate having a channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409Unipolar field-effect transistors
    • H01L29/66477Unipolar field-effect transistors with an insulated gate, i.e. MISFET
    • H01L29/66787Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel
    • H01L29/66795Unipolar field-effect transistors with an insulated gate, i.e. MISFET with a gate at the side of the channel with a horizontal current flow in a vertical sidewall of a semiconductor body, e.g. FinFET, MuGFET

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Bipolar Transistors (AREA)
DE602004026063T 2003-06-25 2004-06-25 Hochdichtes finfet-integrationsverfahren Expired - Lifetime DE602004026063D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/604,077 US6894326B2 (en) 2003-06-25 2003-06-25 High-density finFET integration scheme
PCT/US2004/020553 WO2005001905A2 (en) 2003-06-25 2004-06-25 High-density finfet integration scheme

Publications (1)

Publication Number Publication Date
DE602004026063D1 true DE602004026063D1 (de) 2010-04-29

Family

ID=33539877

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004026063T Expired - Lifetime DE602004026063D1 (de) 2003-06-25 2004-06-25 Hochdichtes finfet-integrationsverfahren

Country Status (7)

Country Link
US (2) US6894326B2 (de)
EP (1) EP1644988B1 (de)
KR (1) KR100734997B1 (de)
CN (1) CN100492666C (de)
AT (1) ATE461526T1 (de)
DE (1) DE602004026063D1 (de)
WO (1) WO2005001905A2 (de)

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US7754560B2 (en) * 2006-01-10 2010-07-13 Freescale Semiconductor, Inc. Integrated circuit using FinFETs and having a static random access memory (SRAM)
US7723805B2 (en) * 2006-01-10 2010-05-25 Freescale Semiconductor, Inc. Electronic device including a fin-type transistor structure and a process for forming the electronic device
US7709303B2 (en) * 2006-01-10 2010-05-04 Freescale Semiconductor, Inc. Process for forming an electronic device including a fin-type structure
US7301210B2 (en) * 2006-01-12 2007-11-27 International Business Machines Corporation Method and structure to process thick and thin fins and variable fin to fin spacing
US7560798B2 (en) * 2006-02-27 2009-07-14 International Business Machines Corporation High performance tapered varactor
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JP5525127B2 (ja) * 2007-11-12 2014-06-18 ピーエスフォー ルクスコ エスエイアールエル 半導体装置及びその製造方法
US7927938B2 (en) 2007-11-19 2011-04-19 Micron Technology, Inc. Fin-JFET
US7829951B2 (en) * 2008-11-06 2010-11-09 Qualcomm Incorporated Method of fabricating a fin field effect transistor (FinFET) device
EP2362817A4 (de) * 2008-11-25 2017-09-06 Justin V. Page Schweissgerät und schweissverfahren
US8633076B2 (en) * 2010-11-23 2014-01-21 Taiwan Semiconductor Manufacturing Company, Ltd. Method for adjusting fin width in integrated circuitry
US8513131B2 (en) 2011-03-17 2013-08-20 International Business Machines Corporation Fin field effect transistor with variable channel thickness for threshold voltage tuning
US8580692B2 (en) 2011-06-29 2013-11-12 International Business Machines Corporation Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation
US8586482B2 (en) 2011-06-29 2013-11-19 International Business Machines Corporation Film stack including metal hardmask layer for sidewall image transfer fin field effect transistor formation
US8637930B2 (en) * 2011-10-13 2014-01-28 International Business Machines Company FinFET parasitic capacitance reduction using air gap
US8569125B2 (en) * 2011-11-30 2013-10-29 International Business Machines Corporation FinFET with improved gate planarity
US8569152B1 (en) 2012-06-04 2013-10-29 International Business Machines Corporation Cut-very-last dual-epi flow
US8697515B2 (en) 2012-06-06 2014-04-15 Taiwan Semiconductor Manufacturing Company, Ltd. Method of making a FinFET device
US8617961B1 (en) * 2012-07-18 2013-12-31 International Business Machines Corporation Post-gate isolation area formation for fin field effect transistor device
US8741701B2 (en) 2012-08-14 2014-06-03 International Business Machines Corporation Fin structure formation including partial spacer removal
US9142548B2 (en) * 2012-09-04 2015-09-22 Qualcomm Incorporated FinFET compatible capacitor circuit
US20140167162A1 (en) 2012-12-13 2014-06-19 International Business Machines Corporation Finfet with merge-free fins
US8813016B1 (en) * 2013-01-28 2014-08-19 Taiwan Semiconductor Manufacturing Company Limited Multiple via connections using connectivity rings
US8927397B2 (en) 2013-02-07 2015-01-06 International Business Machines Corporation Diode structure and method for gate all around silicon nanowire technologies
US9190419B2 (en) 2013-02-07 2015-11-17 International Business Machines Corporation Diode structure and method for FINFET technologies
US9006087B2 (en) 2013-02-07 2015-04-14 International Business Machines Corporation Diode structure and method for wire-last nanomesh technologies
US9704880B2 (en) * 2013-11-06 2017-07-11 Taiwan Semiconductor Manufacturing Company Limited Systems and methods for a semiconductor structure having multiple semiconductor-device layers
US9224654B2 (en) 2013-11-25 2015-12-29 International Business Machines Corporation Fin capacitor employing sidewall image transfer
US9633906B2 (en) 2014-01-24 2017-04-25 International Business Machines Corporation Gate structure cut after formation of epitaxial active regions
US9252243B2 (en) 2014-02-07 2016-02-02 International Business Machines Corporation Gate structure integration scheme for fin field effect transistors
US10475886B2 (en) 2014-12-16 2019-11-12 International Business Machines Corporation Modified fin cut after epitaxial growth
US9748364B2 (en) * 2015-04-21 2017-08-29 Varian Semiconductor Equipment Associates, Inc. Method for fabricating three dimensional device
US10381465B2 (en) 2015-04-21 2019-08-13 Varian Semiconductor Equipment Associates, Inc. Method for fabricating asymmetrical three dimensional device
EP3136446A1 (de) * 2015-08-28 2017-03-01 Nederlandse Organisatie voor toegepast- natuurwetenschappelijk onderzoek TNO Tft-vorrichtung und herstellungsverfahren
US9768272B2 (en) 2015-09-30 2017-09-19 International Business Machines Corporation Replacement gate FinFET process using a sit process to define source/drain regions, gate spacers and a gate cavity
US9530890B1 (en) 2015-11-02 2016-12-27 International Business Machines Corporation Parasitic capacitance reduction
US9966338B1 (en) * 2017-04-18 2018-05-08 Globalfoundries Inc. Pre-spacer self-aligned cut formation
US10276718B2 (en) * 2017-08-31 2019-04-30 Taiwan Semiconductor Manufacturing Co., Ltd. FinFET having a relaxation prevention anchor

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Also Published As

Publication number Publication date
ATE461526T1 (de) 2010-04-15
US20050082578A1 (en) 2005-04-21
KR20060009015A (ko) 2006-01-27
EP1644988B1 (de) 2010-03-17
US6987289B2 (en) 2006-01-17
CN1839483A (zh) 2006-09-27
US6894326B2 (en) 2005-05-17
EP1644988A2 (de) 2006-04-12
KR100734997B1 (ko) 2007-07-04
CN100492666C (zh) 2009-05-27
US20040262698A1 (en) 2004-12-30
EP1644988A4 (de) 2007-04-11
WO2005001905A3 (en) 2006-02-23
WO2005001905A2 (en) 2005-01-06

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Legal Events

Date Code Title Description
8320 Willingness to grant licences declared (paragraph 23)
8364 No opposition during term of opposition