DE60239209D1 - Herstellungsverfahren für feldeffekttransistor mit selbstjustierten horizontalen gates - Google Patents
Herstellungsverfahren für feldeffekttransistor mit selbstjustierten horizontalen gatesInfo
- Publication number
- DE60239209D1 DE60239209D1 DE60239209T DE60239209T DE60239209D1 DE 60239209 D1 DE60239209 D1 DE 60239209D1 DE 60239209 T DE60239209 T DE 60239209T DE 60239209 T DE60239209 T DE 60239209T DE 60239209 D1 DE60239209 D1 DE 60239209D1
- Authority
- DE
- Germany
- Prior art keywords
- self
- gate
- effect transistor
- manufacturing
- field effect
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
- 230000005669 field effect Effects 0.000 title abstract 2
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000000758 substrate Substances 0.000 abstract 2
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/66772—Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78645—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate
- H01L29/78648—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with multiple gate arranged on opposing sides of the channel
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Ceramic Engineering (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Junction Field-Effect Transistors (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
FR0111366A FR2829294B1 (fr) | 2001-09-03 | 2001-09-03 | Transistor a effet de champ a grilles auto-alignees horizontales et procede de fabrication d'un tel transistor |
PCT/FR2002/002972 WO2003021633A1 (fr) | 2001-09-03 | 2002-08-30 | Transistor a effet de champ a grilles auto-alignees horizontales et procede de fabrication d'un tel transistor |
Publications (1)
Publication Number | Publication Date |
---|---|
DE60239209D1 true DE60239209D1 (de) | 2011-03-31 |
Family
ID=8866904
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60239209T Expired - Lifetime DE60239209D1 (de) | 2001-09-03 | 2002-08-30 | Herstellungsverfahren für feldeffekttransistor mit selbstjustierten horizontalen gates |
Country Status (6)
Country | Link |
---|---|
US (1) | US7022562B2 (de) |
EP (1) | EP1428247B1 (de) |
AT (1) | ATE498899T1 (de) |
DE (1) | DE60239209D1 (de) |
FR (1) | FR2829294B1 (de) |
WO (1) | WO2003021633A1 (de) |
Families Citing this family (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6946696B2 (en) * | 2002-12-23 | 2005-09-20 | International Business Machines Corporation | Self-aligned isolation double-gate FET |
US7491644B2 (en) * | 2004-09-10 | 2009-02-17 | Commissariat A L'energie Atomique | Manufacturing process for a transistor made of thin layers |
DE602005015473D1 (de) | 2004-09-23 | 2009-08-27 | Bayer Cropscience Ag | Verfahren und mittel zur herstellung von hyaluronan |
US7341915B2 (en) * | 2005-05-31 | 2008-03-11 | Freescale Semiconductor, Inc. | Method of making planar double gate silicon-on-insulator structures |
US7563681B2 (en) * | 2006-01-27 | 2009-07-21 | Freescale Semiconductor, Inc. | Double-gated non-volatile memory and methods for forming thereof |
FR2899381B1 (fr) | 2006-03-28 | 2008-07-18 | Commissariat Energie Atomique | Procede de realisation d'un transistor a effet de champ a grilles auto-alignees |
FR2911004B1 (fr) | 2006-12-28 | 2009-05-15 | Commissariat Energie Atomique | Procede de realisation de transistors a double-grille asymetriques permettant la realisation de transistors a double-grille asymetriques et symetriques sur un meme substrat |
FR2913526B1 (fr) | 2007-03-09 | 2009-05-29 | Commissariat Energie Atomique | Procede de fabrication d'un transistor a effet de champ a grilles auto-alignees |
US8455268B2 (en) * | 2007-08-31 | 2013-06-04 | Spansion Llc | Gate replacement with top oxide regrowth for the top oxide improvement |
FR2932609B1 (fr) * | 2008-06-11 | 2010-12-24 | Commissariat Energie Atomique | Transistor soi avec plan de masse et grille auto-alignes et oxyde enterre d'epaisseur variable |
US9136111B1 (en) * | 2011-07-01 | 2015-09-15 | Bae Systems Information And Electronic Systems Integration Inc. | Field effect transistors with gate electrodes having Ni and Ti metal layers |
US9490340B2 (en) | 2014-06-18 | 2016-11-08 | Globalfoundries Inc. | Methods of forming nanowire devices with doped extension regions and the resulting devices |
US9431512B2 (en) * | 2014-06-18 | 2016-08-30 | Globalfoundries Inc. | Methods of forming nanowire devices with spacers and the resulting devices |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5168072A (en) * | 1990-10-12 | 1992-12-01 | Texas Instruments Incorporated | Method of fabricating an high-performance insulated-gate field-effect transistor |
US5273921A (en) * | 1991-12-27 | 1993-12-28 | Purdue Research Foundation | Methods for fabricating a dual-gated semiconductor-on-insulator field effect transistor |
JP3460863B2 (ja) * | 1993-09-17 | 2003-10-27 | 三菱電機株式会社 | 半導体装置の製造方法 |
US5773331A (en) * | 1996-12-17 | 1998-06-30 | International Business Machines Corporation | Method for making single and double gate field effect transistors with sidewall source-drain contacts |
US6380039B2 (en) * | 1998-05-06 | 2002-04-30 | Interuniversitair Microelektronica Centrum (Imec Vzw) | Method for forming a FET having L-shaped insulating spacers |
KR100279264B1 (ko) * | 1998-12-26 | 2001-02-01 | 김영환 | 더블 게이트 구조를 갖는 에스·오·아이 트랜지스터 및 그의제조방법 |
DE10052131C2 (de) * | 2000-10-20 | 2003-02-13 | Advanced Micro Devices Inc | Verfahren zur Herstellung von Feldeffekttransistoren mit einer vollständig selbstjustierenden Technologie |
-
2001
- 2001-09-03 FR FR0111366A patent/FR2829294B1/fr not_active Expired - Fee Related
-
2002
- 2002-08-30 AT AT02774890T patent/ATE498899T1/de not_active IP Right Cessation
- 2002-08-30 WO PCT/FR2002/002972 patent/WO2003021633A1/fr active Application Filing
- 2002-08-30 EP EP02774890A patent/EP1428247B1/de not_active Expired - Lifetime
- 2002-08-30 US US10/486,369 patent/US7022562B2/en not_active Expired - Lifetime
- 2002-08-30 DE DE60239209T patent/DE60239209D1/de not_active Expired - Lifetime
Also Published As
Publication number | Publication date |
---|---|
FR2829294A1 (fr) | 2003-03-07 |
EP1428247A1 (de) | 2004-06-16 |
WO2003021633A1 (fr) | 2003-03-13 |
EP1428247B1 (de) | 2011-02-16 |
US7022562B2 (en) | 2006-04-04 |
US20040197977A1 (en) | 2004-10-07 |
ATE498899T1 (de) | 2011-03-15 |
FR2829294B1 (fr) | 2004-10-15 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
TW200633137A (en) | Semiconductor constructions and transistors, and methods of forming semiconductor constructions and transistors | |
DE60337027D1 (de) | Transistoren mit bedeckten p-typ-schichten neben der sourcezone und herstellungsverfahren dafür | |
WO2006072575A3 (en) | Ldmos transistor | |
TW345693B (en) | LDMOS device with self-aligned RESURF region and method of fabrication | |
DE602004026063D1 (de) | Hochdichtes finfet-integrationsverfahren | |
WO2005086237A3 (en) | Ldmos transistor and method of making the same | |
AU2002334921A1 (en) | Delta doped silicon carbide metal-semiconductor field effect transistors and methods of fabricating them | |
TW200715562A (en) | Thin film transistor substrate and fabrication thereof | |
WO2004019384A3 (en) | Semiconductor constructions with gated isolation regions having indium-doped sub-regions | |
WO2009105466A3 (en) | Reduced leakage current field-effect transistor having asymmetric doping and fabrication method therefor | |
ATE531081T1 (de) | Transistoren auf nirtridbasis mit seitlich aufgewachsener aktivregion und herstellungsverfahren dafür | |
WO2006039597A3 (en) | Metal gate transistors with epitaxial source and drain regions | |
EP1542270A4 (de) | Vertikal-sperrschichtfeldeffekttransistor und verfahren zu seiner herstellung | |
TW200507255A (en) | Semiconductor device and method of fabricating the same | |
ATE375008T1 (de) | Feldeffekttransistorstruktur und herstellungsverfahren | |
DE60239209D1 (de) | Herstellungsverfahren für feldeffekttransistor mit selbstjustierten horizontalen gates | |
TW200633209A (en) | Semiconductor device having transistor with vertical gate electrode and method of fabricating the same | |
WO2007082266A3 (en) | Semiconductor transistors with expanded top portions of gates | |
DE50213486D1 (de) | LDMOS-Transistor und dessen Herstellungsverfahren | |
DE602004012311D1 (de) | Feldeffekttransistor mit isoliertem graben-gate | |
TW200629427A (en) | Transistor structure and method of manufacturing thereof | |
DE602005013815D1 (de) | Transistoren mit vergrabenen n- und p-regionen untür | |
WO2007110507A3 (fr) | Procede de realisation d'un transistor a effet de champ a grilles auto-alignees | |
WO2004012270A3 (en) | Field effect transistor and method of manufacturing same | |
WO2002078090A3 (en) | Field-effect transistor structure and method of manufacture |