DE602004008034D1 - Trigate und gate-all-around mosfet-bauelemente und zugehörige herstellungsverfahren - Google Patents

Trigate und gate-all-around mosfet-bauelemente und zugehörige herstellungsverfahren

Info

Publication number
DE602004008034D1
DE602004008034D1 DE602004008034T DE602004008034T DE602004008034D1 DE 602004008034 D1 DE602004008034 D1 DE 602004008034D1 DE 602004008034 T DE602004008034 T DE 602004008034T DE 602004008034 T DE602004008034 T DE 602004008034T DE 602004008034 D1 DE602004008034 D1 DE 602004008034D1
Authority
DE
Germany
Prior art keywords
trigate
gate
manufacturing methods
related manufacturing
mosfet components
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004008034T
Other languages
English (en)
Other versions
DE602004008034T2 (de
Inventor
Judy Xilin An
Haihong Wang
Bin Yu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of DE602004008034D1 publication Critical patent/DE602004008034D1/de
Application granted granted Critical
Publication of DE602004008034T2 publication Critical patent/DE602004008034T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/62—Fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/024—Manufacture or treatment of FETs having insulated gates [IGFET] of fin field-effect transistors [FinFET]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/017—Manufacture or treatment using dummy gates in processes wherein at least parts of the final gates are self-aligned to the dummy gates, i.e. replacement gate processes

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
DE602004008034T 2003-01-23 2004-01-15 Trigate und gate-all-around mosfet-bauelemente und zugehörige herstellungsverfahren Expired - Lifetime DE602004008034T2 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/348,911 US7259425B2 (en) 2003-01-23 2003-01-23 Tri-gate and gate around MOSFET devices and methods for making same
US348911 2003-01-23
PCT/US2004/000966 WO2004068571A1 (en) 2003-01-23 2004-01-15 Tri-gate and gate around mosfet devices and methods for making same

Publications (2)

Publication Number Publication Date
DE602004008034D1 true DE602004008034D1 (de) 2007-09-20
DE602004008034T2 DE602004008034T2 (de) 2008-04-30

Family

ID=32735400

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004008034T Expired - Lifetime DE602004008034T2 (de) 2003-01-23 2004-01-15 Trigate und gate-all-around mosfet-bauelemente und zugehörige herstellungsverfahren

Country Status (8)

Country Link
US (1) US7259425B2 (de)
EP (1) EP1593150B1 (de)
JP (1) JP4795932B2 (de)
KR (1) KR101066975B1 (de)
CN (2) CN1742362A (de)
DE (1) DE602004008034T2 (de)
TW (1) TWI353054B (de)
WO (1) WO2004068571A1 (de)

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US7196374B1 (en) * 2003-09-03 2007-03-27 Advanced Micro Devices, Inc. Doped structure for FinFET devices
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US7579280B2 (en) 2004-06-01 2009-08-25 Intel Corporation Method of patterning a film
US7452778B2 (en) * 2004-06-10 2008-11-18 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor nano-wire devices and methods of fabrication
US7042009B2 (en) 2004-06-30 2006-05-09 Intel Corporation High mobility tri-gate devices and methods of fabrication
US7348284B2 (en) 2004-08-10 2008-03-25 Intel Corporation Non-planar pMOS structure with a strained channel region and an integrated strained CMOS flow
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KR100591770B1 (ko) * 2004-09-01 2006-06-26 삼성전자주식회사 반도체 핀을 이용한 플래쉬 메모리 소자 및 그 제조 방법
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US20060086977A1 (en) 2004-10-25 2006-04-27 Uday Shah Nonplanar device with thinned lower body portion and method of fabrication
EP1844498B1 (de) * 2005-01-28 2012-03-14 Nxp B.V. Verfahren zur herstellung eines dual-gate fet
US7518196B2 (en) 2005-02-23 2009-04-14 Intel Corporation Field effect transistor with narrow bandgap source and drain regions and method of fabrication
US20060202266A1 (en) 2005-03-14 2006-09-14 Marko Radosavljevic Field effect transistor with metal source/drain regions
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US7858481B2 (en) 2005-06-15 2010-12-28 Intel Corporation Method for fabricating transistor with thinned channel
US7547637B2 (en) 2005-06-21 2009-06-16 Intel Corporation Methods for patterning a semiconductor film
US7411252B2 (en) * 2005-06-21 2008-08-12 International Business Machines Corporation Substrate backgate for trigate FET
US7279375B2 (en) 2005-06-30 2007-10-09 Intel Corporation Block contact architectures for nanoscale channel transistors
US7288802B2 (en) * 2005-07-27 2007-10-30 International Business Machines Corporation Virtual body-contacted trigate
US7348642B2 (en) 2005-08-03 2008-03-25 International Business Machines Corporation Fin-type field effect transistor
US7402875B2 (en) 2005-08-17 2008-07-22 Intel Corporation Lateral undercut of metal gate in SOI device
JP4963021B2 (ja) * 2005-09-06 2012-06-27 独立行政法人産業技術総合研究所 半導体構造
US20070090416A1 (en) 2005-09-28 2007-04-26 Doyle Brian S CMOS devices with a single work function gate electrode and method of fabrication
US7479421B2 (en) * 2005-09-28 2009-01-20 Intel Corporation Process for integrating planar and non-planar CMOS transistors on a bulk substrate and article made thereby
US7638381B2 (en) * 2005-10-07 2009-12-29 International Business Machines Corporation Methods for fabricating a semiconductor structure using a mandrel and semiconductor structures formed thereby
US7326976B2 (en) * 2005-11-15 2008-02-05 International Business Machines Corporation Corner dominated trigate field effect transistor
US7485503B2 (en) 2005-11-30 2009-02-03 Intel Corporation Dielectric interface for group III-V semiconductor device
US8143646B2 (en) 2006-08-02 2012-03-27 Intel Corporation Stacking fault and twin blocking barrier for integrating III-V on Si
US7692254B2 (en) * 2007-07-16 2010-04-06 International Business Machines Corporation Fin-type field effect transistor structure with merged source/drain silicide and method of forming the structure
US7671418B2 (en) * 2007-09-14 2010-03-02 Advanced Micro Devices, Inc. Double layer stress for multiple gate transistors
JP4518180B2 (ja) * 2008-04-16 2010-08-04 ソニー株式会社 半導体装置、および、その製造方法
US8362566B2 (en) 2008-06-23 2013-01-29 Intel Corporation Stress in trigate devices using complimentary gate fill materials
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US8188546B2 (en) * 2009-08-18 2012-05-29 International Business Machines Corporation Multi-gate non-planar field effect transistor structure and method of forming the structure using a dopant implant process to tune device drive current
US8344425B2 (en) * 2009-12-30 2013-01-01 Intel Corporation Multi-gate III-V quantum well structures
US8263451B2 (en) 2010-02-26 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Epitaxy profile engineering for FinFETs
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US8502279B2 (en) * 2011-05-16 2013-08-06 Globalfoundries Singapore Pte. Ltd. Nano-electro-mechanical system (NEMS) structures with actuatable semiconductor fin on bulk substrates
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US9224611B2 (en) * 2012-08-09 2015-12-29 Macronix International Co., Ltd. Semiconductor structure and manufacturing method and operating method of the same
US8847324B2 (en) * 2012-12-17 2014-09-30 Synopsys, Inc. Increasing ION /IOFF ratio in FinFETs and nano-wires
US9224849B2 (en) * 2012-12-28 2015-12-29 Taiwan Semiconductor Manufacturing Company, Ltd. Transistors with wrapped-around gates and methods for forming the same
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US9006842B2 (en) 2013-05-30 2015-04-14 Taiwan Semiconductor Manufacturing Company, Ltd. Tuning strain in semiconductor devices
US9349850B2 (en) 2013-07-17 2016-05-24 Taiwan Semiconductor Manufacturing Company, Ltd. Thermally tuning strain in semiconductor devices
US9685501B2 (en) 2014-04-02 2017-06-20 International Business Machines Corporation Low parasitic capacitance finFET device
US9590105B2 (en) * 2014-04-07 2017-03-07 National Chiao-Tung University Semiconductor device with metal alloy over fin, conductive layer over channel region of fin, and semiconductive layer over conductive layer and formation thereof
US10418271B2 (en) 2014-06-13 2019-09-17 Taiwan Semiconductor Manufacturing Co., Ltd. Method of forming isolation layer
US9755071B1 (en) * 2016-06-30 2017-09-05 International Business Machines Corporation Merged gate for vertical transistors
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Also Published As

Publication number Publication date
WO2004068571A1 (en) 2004-08-12
KR20050095871A (ko) 2005-10-04
CN102214585B (zh) 2014-02-26
EP1593150B1 (de) 2007-08-08
JP2006517060A (ja) 2006-07-13
DE602004008034T2 (de) 2008-04-30
CN1742362A (zh) 2006-03-01
TW200417013A (en) 2004-09-01
JP4795932B2 (ja) 2011-10-19
CN102214585A (zh) 2011-10-12
US20040145000A1 (en) 2004-07-29
KR101066975B1 (ko) 2011-09-23
EP1593150A1 (de) 2005-11-09
US7259425B2 (en) 2007-08-21
TWI353054B (en) 2011-11-21

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