DE602004001228D1 - Bereitstellung datenzurückhaltungszwischenspeicher in integrierten schaltungen - Google Patents

Bereitstellung datenzurückhaltungszwischenspeicher in integrierten schaltungen

Info

Publication number
DE602004001228D1
DE602004001228D1 DE602004001228T DE602004001228T DE602004001228D1 DE 602004001228 D1 DE602004001228 D1 DE 602004001228D1 DE 602004001228 T DE602004001228 T DE 602004001228T DE 602004001228 T DE602004001228 T DE 602004001228T DE 602004001228 D1 DE602004001228 D1 DE 602004001228D1
Authority
DE
Germany
Prior art keywords
provision
integrated circuits
data recovery
intermediate members
recovery intermediate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE602004001228T
Other languages
English (en)
Other versions
DE602004001228T2 (de
Inventor
Michael Austin
Theodore Blaauw
Nigel Mudge
Krisztian Flautner
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
ARM Ltd
University of Michigan
Original Assignee
ARM Ltd
Advanced Risc Machines Ltd
University of Michigan
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US10/392,382 external-priority patent/US7278080B2/en
Application filed by ARM Ltd, Advanced Risc Machines Ltd, University of Michigan filed Critical ARM Ltd
Publication of DE602004001228D1 publication Critical patent/DE602004001228D1/de
Application granted granted Critical
Publication of DE602004001228T2 publication Critical patent/DE602004001228T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G06F11/1666—Error detection or correction of the data by redundancy in hardware where the redundant component is memory or memory area
    • G06F11/167—Error detection by comparing the memory output
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/16—Error detection or correction of the data by redundancy in hardware
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3237—Power saving characterised by the action undertaken by disabling clock generation or distribution
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26—Power supply means, e.g. regulation thereof
    • G06F1/32—Means for saving power
    • G06F1/3203—Power management, i.e. event-based initiation of a power-saving mode
    • G06F1/3234—Power saving characterised by the action undertaken
    • G06F1/3287—Power saving characterised by the action undertaken by switching off individual functional units in the computer system
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3867—Concurrent instruction execution, e.g. pipeline or look ahead using instruction pipelines
    • G06F9/3869—Implementation aspects, e.g. pipeline latches; pipeline synchronisation and clocking
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2281—Timing of a read operation
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D30/00—Reducing energy consumption in communication networks
    • Y02D30/50—Reducing energy consumption in communication networks in wire-line communication networks, e.g. low power modes or reduced link rate

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Software Systems (AREA)
  • Quality & Reliability (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • Logic Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Advance Control (AREA)
  • Pulse Circuits (AREA)
  • Power Sources (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
DE602004001228T 2003-03-20 2004-03-17 Bereitstellung von zwischenspeichern zur zurückhaltung von daten in integrierten schaltungen Expired - Lifetime DE602004001228T2 (de)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US10/392,382 US7278080B2 (en) 2003-03-20 2003-03-20 Error detection and recovery within processing stages of an integrated circuit
US392382 2003-03-20
US10/779,817 US7310755B2 (en) 2003-03-20 2004-02-18 Data retention latch provision within integrated circuits
US779817 2004-02-18
PCT/GB2004/001147 WO2004084053A1 (en) 2003-03-20 2004-03-17 Data retention latch provision within integrated circuits

Publications (2)

Publication Number Publication Date
DE602004001228D1 true DE602004001228D1 (de) 2006-07-27
DE602004001228T2 DE602004001228T2 (de) 2007-05-03

Family

ID=33032650

Family Applications (1)

Application Number Title Priority Date Filing Date
DE602004001228T Expired - Lifetime DE602004001228T2 (de) 2003-03-20 2004-03-17 Bereitstellung von zwischenspeichern zur zurückhaltung von daten in integrierten schaltungen

Country Status (6)

Country Link
EP (1) EP1604265B1 (de)
JP (1) JP4335253B2 (de)
KR (1) KR100994188B1 (de)
DE (1) DE602004001228T2 (de)
RU (1) RU2005129257A (de)
WO (1) WO2004084053A1 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102005022875B4 (de) * 2005-05-18 2007-05-31 Infineon Technologies Ag Schaltung und Verfahren zur Steuerung des Leistungsverbrauchs in integrierten Schaltungen
US8327173B2 (en) * 2007-12-17 2012-12-04 Nvidia Corporation Integrated circuit device core power down independent of peripheral device operation
US8321824B2 (en) 2009-04-30 2012-11-27 Synopsys, Inc. Multiple-power-domain static timing analysis
JP2011090448A (ja) * 2009-10-21 2011-05-06 Renesas Electronics Corp 半導体集積回路
US9063734B2 (en) * 2012-09-07 2015-06-23 Atmel Corporation Microcontroller input/output connector state retention in low-power modes
KR101570112B1 (ko) 2014-10-02 2015-11-19 전자부품연구원 Ｓｒ 래치의 준안정성 탐지 및 보정 회로
US10348302B1 (en) * 2018-05-31 2019-07-09 Bae Systems Information And Electronic Systems Integration Inc. Radiation-hardened latch circuit

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5203003A (en) 1991-03-28 1993-04-13 Echelon Corporation Computer architecture for conserving power by using shared resources and method for suspending processor execution in pipeline

Also Published As

Publication number Publication date
EP1604265B1 (de) 2006-06-14
DE602004001228T2 (de) 2007-05-03
JP4335253B2 (ja) 2009-09-30
JP2006520955A (ja) 2006-09-14
KR100994188B1 (ko) 2010-11-12
RU2005129257A (ru) 2006-01-27
EP1604265A1 (de) 2005-12-14
WO2004084053A1 (en) 2004-09-30
KR20050118184A (ko) 2005-12-15
WO2004084053A8 (en) 2005-07-28

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