DE60303045D1 - Auffrischen von mehrportspeicher in integrierten schaltungen - Google Patents
Auffrischen von mehrportspeicher in integrierten schaltungenInfo
- Publication number
- DE60303045D1 DE60303045D1 DE60303045T DE60303045T DE60303045D1 DE 60303045 D1 DE60303045 D1 DE 60303045D1 DE 60303045 T DE60303045 T DE 60303045T DE 60303045 T DE60303045 T DE 60303045T DE 60303045 D1 DE60303045 D1 DE 60303045D1
- Authority
- DE
- Germany
- Prior art keywords
- refreshing
- integrated circuits
- multiport storage
- multiport
- storage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
- G11C11/40603—Arbitration, priority and concurrent access to memory cells for read/write or refresh operations
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/403—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh
- G11C11/405—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells with charge regeneration common to a multiplicity of memory cells, i.e. external refresh with three charge-transfer gates, e.g. MOS transistors, per cell
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
- G11C11/406—Management or control of the refreshing or charge-regeneration cycles
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Dram (AREA)
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US65128 | 2002-09-19 | ||
US10/065,128 US6711081B1 (en) | 2002-09-19 | 2002-09-19 | Refreshing of multi-port memory in integrated circuits |
PCT/EP2003/009447 WO2004027781A1 (en) | 2002-09-19 | 2003-08-26 | Refreshing of multi-port memory in integrated circuits |
Publications (2)
Publication Number | Publication Date |
---|---|
DE60303045D1 true DE60303045D1 (de) | 2006-02-02 |
DE60303045T2 DE60303045T2 (de) | 2006-08-03 |
Family
ID=31975651
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE60303045T Expired - Lifetime DE60303045T2 (de) | 2002-09-19 | 2003-08-26 | Auffrischen von mehrportspeicher in integrierten schaltungen |
Country Status (6)
Country | Link |
---|---|
US (1) | US6711081B1 (de) |
EP (1) | EP1540658B1 (de) |
JP (1) | JP2005531101A (de) |
CN (1) | CN100470668C (de) |
DE (1) | DE60303045T2 (de) |
WO (1) | WO2004027781A1 (de) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6958944B1 (en) * | 2004-05-26 | 2005-10-25 | Taiwan Semiconductor Manufacturing Co., Ltd. | Enhanced refresh circuit and method for reduction of DRAM refresh cycles |
US7619942B2 (en) * | 2005-09-29 | 2009-11-17 | Hynix Semiconductor Inc. | Multi-port memory device having self-refresh mode |
US7362640B2 (en) * | 2005-12-29 | 2008-04-22 | Mosaid Technologies Incorporated | Apparatus and method for self-refreshing dynamic random access memory cells |
US8531907B2 (en) * | 2011-01-28 | 2013-09-10 | Infineon Technologies Ag | Semiconductor memory device and method |
US9251885B2 (en) * | 2012-12-28 | 2016-02-02 | Intel Corporation | Throttling support for row-hammer counters |
KR101639946B1 (ko) * | 2015-04-13 | 2016-07-14 | 엘에스산전 주식회사 | 듀얼 포트 메모리 시스템의 접근 제어 방법 |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4203159A (en) * | 1978-10-05 | 1980-05-13 | Wanlass Frank M | Pseudostatic electronic memory |
JPS59140694A (ja) * | 1983-01-31 | 1984-08-13 | Sharp Corp | ダイナミツクramのリフレツシユ方法 |
KR0135699B1 (ko) * | 1994-07-11 | 1998-04-24 | 김주용 | 셀프-리프레쉬 가능한 듀얼포트 동적 캠셀 및 리프레쉬장치 |
JPH08115594A (ja) * | 1994-10-18 | 1996-05-07 | Oki Electric Ind Co Ltd | デュアルポートdramのデータ読出転送とリフレッシュの方法 |
US5923593A (en) * | 1996-12-17 | 1999-07-13 | Monolithic Systems, Inc. | Multi-port DRAM cell and memory system using same |
US5963497A (en) * | 1998-05-18 | 1999-10-05 | Silicon Aquarius, Inc. | Dynamic random access memory system with simultaneous access and refresh operations and methods for using the same |
US6487107B1 (en) * | 1999-09-29 | 2002-11-26 | Infineon Technologies Ag | Retention time of memory cells by reducing leakage current |
JP3708801B2 (ja) * | 2000-06-16 | 2005-10-19 | 松下電器産業株式会社 | 半導体記憶装置 |
-
2002
- 2002-09-19 US US10/065,128 patent/US6711081B1/en not_active Expired - Fee Related
-
2003
- 2003-08-26 DE DE60303045T patent/DE60303045T2/de not_active Expired - Lifetime
- 2003-08-26 WO PCT/EP2003/009447 patent/WO2004027781A1/en active IP Right Grant
- 2003-08-26 JP JP2004536957A patent/JP2005531101A/ja active Pending
- 2003-08-26 CN CNB038224704A patent/CN100470668C/zh not_active Expired - Fee Related
- 2003-08-26 EP EP03797250A patent/EP1540658B1/de not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP2005531101A (ja) | 2005-10-13 |
WO2004027781A1 (en) | 2004-04-01 |
EP1540658A1 (de) | 2005-06-15 |
CN1685440A (zh) | 2005-10-19 |
EP1540658B1 (de) | 2005-12-28 |
DE60303045T2 (de) | 2006-08-03 |
CN100470668C (zh) | 2009-03-18 |
US6711081B1 (en) | 2004-03-23 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8364 | No opposition during term of opposition | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: ELPIDA MEMORY, INC., TOKYO, JP |
|
8328 | Change in the person/name/address of the agent |
Representative=s name: MEISSNER, BOLTE & PARTNER GBR, 80538 MUENCHEN |