DE60039940D1 - Elektronikkomponente zur Montage auf LPL mit darin verkapseltem Elektronikbauteil und ihre Herstellung - Google Patents

Elektronikkomponente zur Montage auf LPL mit darin verkapseltem Elektronikbauteil und ihre Herstellung

Info

Publication number
DE60039940D1
DE60039940D1 DE60039940T DE60039940T DE60039940D1 DE 60039940 D1 DE60039940 D1 DE 60039940D1 DE 60039940 T DE60039940 T DE 60039940T DE 60039940 T DE60039940 T DE 60039940T DE 60039940 D1 DE60039940 D1 DE 60039940D1
Authority
DE
Germany
Prior art keywords
electronic component
lpl
manufacture
mounting
encapsulated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE60039940T
Other languages
German (de)
English (en)
Inventor
Hiromi Yatsuda
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Japan Radio Co Ltd
Original Assignee
Japan Radio Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Japan Radio Co Ltd filed Critical Japan Radio Co Ltd
Application granted granted Critical
Publication of DE60039940D1 publication Critical patent/DE60039940D1/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H01L23/10—Containers; Seals characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/02—Containers; Seals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0556—Disposition
    • H01L2224/05568—Disposition the whole external layer protruding from the surface
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/05573—Single external layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/35—Mechanical effects
    • H01L2924/351—Thermal stress
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03—Conductive materials
    • H05K2201/0332—Structure of the conductor
    • H05K2201/0364—Conductor shape
    • H05K2201/0379—Stacked conductors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09472—Recessed pad for surface mounting; Recessed electrode of component
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10666—Plated through-hole for surface mounting on PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/11—Treatments characterised by their effect, e.g. heating, cooling, roughening
    • H05K2203/1147—Sealing or impregnating, e.g. of pores
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341—Surface mounted components
    • H05K3/3431—Leadless components
    • H05K3/3442—Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
DE60039940T 1999-06-02 2000-06-02 Elektronikkomponente zur Montage auf LPL mit darin verkapseltem Elektronikbauteil und ihre Herstellung Expired - Lifetime DE60039940D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP15524299 1999-06-02
JP2000137130A JP2001053178A (ja) 1999-06-02 2000-05-10 電子回路装置が封止され回路基板に実装される電子部品及びその製造方法

Publications (1)

Publication Number Publication Date
DE60039940D1 true DE60039940D1 (de) 2008-10-02

Family

ID=26483297

Family Applications (1)

Application Number Title Priority Date Filing Date
DE60039940T Expired - Lifetime DE60039940D1 (de) 1999-06-02 2000-06-02 Elektronikkomponente zur Montage auf LPL mit darin verkapseltem Elektronikbauteil und ihre Herstellung

Country Status (8)

Country Link
US (2) US6362518B1 (fr)
EP (1) EP1058306B1 (fr)
JP (1) JP2001053178A (fr)
KR (1) KR100455058B1 (fr)
CN (1) CN1172438C (fr)
CA (1) CA2310504C (fr)
DE (1) DE60039940D1 (fr)
TW (1) TW452951B (fr)

Families Citing this family (22)

* Cited by examiner, † Cited by third party
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DE60035179T2 (de) * 2000-04-28 2008-02-21 Stmicroelectronics S.R.L., Agrate Brianza Struktur zur elektrischen Verbindung eines ersten mit einem darüberliegenden zweiten Halbleitermaterial, diese elektrische Verbindung verwendendes Komposit und ihre Herstellung
US6624921B1 (en) * 2001-03-12 2003-09-23 Amkor Technology, Inc. Micromirror device package fabrication method
US6586825B1 (en) * 2001-04-26 2003-07-01 Lsi Logic Corporation Dual chip in package with a wire bonded die mounted to a substrate
US6621379B1 (en) * 2001-11-29 2003-09-16 Clarisay, Incorporated Hermetic package for surface acoustic wave device and method of manufacturing the same
TW560020B (en) * 2002-04-15 2003-11-01 Advanced Semiconductor Eng A wafer-level package with a cavity and fabricating method thereof
EP1540736A4 (fr) * 2002-08-28 2006-03-08 Silicon Light Machines Corp Joint situe au niveau plaquette pour dispositifs exempts de silicium
US6809260B1 (en) * 2003-09-22 2004-10-26 Intel Corporation Apparatus and method for an integrated high-performance electrical interconnect
JP2005167969A (ja) * 2003-11-14 2005-06-23 Fujitsu Media Device Kk 弾性波素子および弾性波素子の製造方法
WO2005062356A1 (fr) * 2003-12-24 2005-07-07 Hitachi, Ltd. Dispositif et procede de fabrication dudit dispositif
JP4610244B2 (ja) * 2004-06-28 2011-01-12 京セラ株式会社 弾性表面波装置の製造方法
US7112877B2 (en) * 2004-06-28 2006-09-26 General Electric Company High density package with wrap around interconnect
JP2006108261A (ja) * 2004-10-01 2006-04-20 Sony Corp 機能素子パッケージ及びその製造方法
JP2006226743A (ja) * 2005-02-16 2006-08-31 Mitsubishi Electric Corp 加速度センサ
JP4886485B2 (ja) * 2006-11-28 2012-02-29 太陽誘電株式会社 弾性波デバイスおよびその製造方法
JP2008182014A (ja) * 2007-01-24 2008-08-07 Fujikura Ltd パッケージ基板及びその製造方法
WO2009066640A1 (fr) * 2007-11-20 2009-05-28 Japan Radio Co., Ltd. Elément à ondes acoustiques de surface et équipement pour mesurer des caractéristiques de matériau liquide
CN101868917B (zh) 2007-12-14 2014-02-19 株式会社村田制作所 表面波装置及其制造方法
US8698258B2 (en) * 2011-09-30 2014-04-15 General Electric Company 3D integrated electronic device structure including increased thermal dissipation capabilities
DE102011088216A1 (de) * 2011-12-12 2013-06-13 Continental Automotive Gmbh Motorsteuergerät mit Opferstruktur
WO2015046402A1 (fr) * 2013-09-26 2015-04-02 京セラ株式会社 Dispositif et module à onde élastique
CN112151389A (zh) * 2019-06-26 2020-12-29 方乔颖 薄膜封装卡的制造方法及其薄膜封装卡
CN114725011A (zh) * 2022-03-18 2022-07-08 南京睿芯峰电子科技有限公司 一种气密性芯片结构及其制备方法

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JPH07115343A (ja) * 1993-04-28 1995-05-02 Matsushita Electric Ind Co Ltd 弾性表面波装置及びその製造方法
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KR100222299B1 (ko) * 1996-12-16 1999-10-01 윤종용 웨이퍼 레벨 칩 스케일 패키지 및 그의 제조 방법
US5883782A (en) * 1997-03-05 1999-03-16 Intel Corporation Apparatus for attaching a heat sink to a PCB mounted semiconductor package
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KR20000003305A (ko) * 1998-06-27 2000-01-15 윤종용 볼 그리드 어레이 패키지
JP2000114918A (ja) * 1998-10-05 2000-04-21 Mitsubishi Electric Corp 表面弾性波装置及びその製造方法
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JP3351402B2 (ja) * 1999-04-28 2002-11-25 株式会社村田製作所 電子素子、弾性表面波素子、それらの実装方法、電子部品または弾性表面波装置の製造方法、および、弾性表面波装置
TWI280641B (en) * 2001-12-28 2007-05-01 Via Tech Inc Chip structure

Also Published As

Publication number Publication date
US6815313B2 (en) 2004-11-09
CN1276648A (zh) 2000-12-13
JP2001053178A (ja) 2001-02-23
EP1058306B1 (fr) 2008-08-20
EP1058306A2 (fr) 2000-12-06
EP1058306A3 (fr) 2005-03-30
KR20010007176A (ko) 2001-01-26
US20020056897A1 (en) 2002-05-16
KR100455058B1 (ko) 2004-11-08
US6362518B1 (en) 2002-03-26
CA2310504A1 (fr) 2000-12-02
CA2310504C (fr) 2005-05-10
CN1172438C (zh) 2004-10-20
TW452951B (en) 2001-09-01

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