DE4319786A1 - In Kunststoff gegossene CCD-Einheit und Verfahren zu deren Herstellung - Google Patents

In Kunststoff gegossene CCD-Einheit und Verfahren zu deren Herstellung

Info

Publication number
DE4319786A1
DE4319786A1 DE19934319786 DE4319786A DE4319786A1 DE 4319786 A1 DE4319786 A1 DE 4319786A1 DE 19934319786 DE19934319786 DE 19934319786 DE 4319786 A DE4319786 A DE 4319786A DE 4319786 A1 DE4319786 A1 DE 4319786A1
Authority
DE
Germany
Prior art keywords
semiconductor chip
glass cover
wall
light receiving
ccd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
DE19934319786
Other languages
German (de)
English (en)
Inventor
Ki Rok Hur
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Goldstar Electron Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Goldstar Electron Co Ltd filed Critical Goldstar Electron Co Ltd
Publication of DE4319786A1 publication Critical patent/DE4319786A1/de
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/315—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed the encapsulation having a cavity
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F39/00—Integrated devices, or assemblies of multiple devices, comprising at least one element covered by group H10F30/00, e.g. radiation detectors comprising photodiode arrays
    • H10F39/80—Constructional details of image sensors
    • H10F39/804—Containers or encapsulations
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10F—INORGANIC SEMICONDUCTOR DEVICES SENSITIVE TO INFRARED RADIATION, LIGHT, ELECTROMAGNETIC RADIATION OF SHORTER WAVELENGTH OR CORPUSCULAR RADIATION
    • H10F77/00—Constructional details of devices covered by this subclass
    • H10F77/50—Encapsulations or containers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42—Wire connectors; Manufacturing methods related thereto
    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0102—Calcium [Ca]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01068—Erbium [Er]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/162—Disposition
    • H01L2924/16235—Connecting to a semiconductor or solid-state bodies, i.e. cap-to-chip
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Solid State Image Pick-Up Elements (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
DE19934319786 1992-06-16 1993-06-15 In Kunststoff gegossene CCD-Einheit und Verfahren zu deren Herstellung Withdrawn DE4319786A1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920010430A KR940001333A (ko) 1992-06-16 1992-06-16 수지봉합형 고체촬상소자 패키지 및 그 제조방법

Publications (1)

Publication Number Publication Date
DE4319786A1 true DE4319786A1 (de) 1993-12-23

Family

ID=19334753

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19934319786 Withdrawn DE4319786A1 (de) 1992-06-16 1993-06-15 In Kunststoff gegossene CCD-Einheit und Verfahren zu deren Herstellung

Country Status (4)

Country Link
JP (1) JPH0653462A (enrdf_load_stackoverflow)
KR (1) KR940001333A (enrdf_load_stackoverflow)
DE (1) DE4319786A1 (enrdf_load_stackoverflow)
TW (1) TW222713B (enrdf_load_stackoverflow)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19724026A1 (de) * 1997-06-06 1998-12-10 Siemens Ag Drucksensor-Bauelement und Verfahren zur Herstellung
US6274927B1 (en) * 1999-06-03 2001-08-14 Amkor Technology, Inc. Plastic package for an optical integrated circuit device and method of making
US6784534B1 (en) 2002-02-06 2004-08-31 Amkor Technology, Inc. Thin integrated circuit package having an optically transparent window
DE10322751B3 (de) * 2003-05-19 2004-09-30 X-Fab Semiconductor Foundries Ag Verfahren zur Herstellung eines in Kunststoff verschlossenen optoelektronischen Bauelementes
WO2004105117A3 (de) * 2003-05-19 2005-02-03 X Fab Semiconductor Foundries Herstellen eines in kunststoff eingekapselten optoelektronischen bauelementes und zugehoerige verfahren
US6861720B1 (en) 2001-08-29 2005-03-01 Amkor Technology, Inc. Placement template and method for placing optical dies
WO2005119756A1 (en) * 2004-06-04 2005-12-15 Melexis Nv Semiconductor package with transparent lid
DE19816309B4 (de) * 1997-04-14 2008-04-03 CiS Institut für Mikrosensorik gGmbH Verfahren zur Direktmontage von Silizium-Sensoren und danach hergestellte Sensoren
WO2008082565A1 (en) * 2006-12-29 2008-07-10 Tessera, Inc. Microelectronic devices and methods of manufacturing such devices
US11699647B2 (en) 2021-04-15 2023-07-11 Infineon Technologies Ag Pre-molded lead frames for semiconductor packages

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100396702B1 (ko) * 2001-01-15 2003-09-03 앰코 테크놀로지 코리아 주식회사 반도체 패키지 및 그 제조방법
KR100806774B1 (ko) * 2007-05-16 2008-02-22 주식회사 펠릭스정보통신 Ａｃ/ｄｃ 변환기 및 이를 이용한 ａｃ/ｄｃ 변환 방법

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE8808815U1 (de) * 1988-06-23 1988-09-15 Heimann Optoelectronics Gmbh, 65199 Wiesbaden Infrarotdetektor
US4812420A (en) * 1986-09-30 1989-03-14 Mitsubishi Denki Kabushiki Kaisha Method of producing a semiconductor device having a light transparent window
DE3937996A1 (de) * 1988-11-25 1990-05-31 Mitsubishi Electric Corp Verfahren zur herstellung von halbleiteranordnungen
DE4133183A1 (de) * 1990-10-13 1992-04-23 Gold Star Electronics Verfahren zur montage eines ccd-gehaeuses sowie ccd-gehaeusekonstruktion
DE4135189A1 (de) * 1990-11-13 1992-05-14 Gold Star Electronics Verfahren zur montage des gehaeuses eines halbleiter-bauelements

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4812420A (en) * 1986-09-30 1989-03-14 Mitsubishi Denki Kabushiki Kaisha Method of producing a semiconductor device having a light transparent window
DE8808815U1 (de) * 1988-06-23 1988-09-15 Heimann Optoelectronics Gmbh, 65199 Wiesbaden Infrarotdetektor
DE3937996A1 (de) * 1988-11-25 1990-05-31 Mitsubishi Electric Corp Verfahren zur herstellung von halbleiteranordnungen
DE4133183A1 (de) * 1990-10-13 1992-04-23 Gold Star Electronics Verfahren zur montage eines ccd-gehaeuses sowie ccd-gehaeusekonstruktion
DE4135189A1 (de) * 1990-11-13 1992-05-14 Gold Star Electronics Verfahren zur montage des gehaeuses eines halbleiter-bauelements

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
CHEN, Cherh-Lin et.al.: Packing Technology for a Low Temperature Astrometric Sensor Array. In: IEEETransactions on Components, Hybrids, and Manufac- turing Technology, Vol.13, No.4, December 1990, S.1083-1089 *

Cited By (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19816309B4 (de) * 1997-04-14 2008-04-03 CiS Institut für Mikrosensorik gGmbH Verfahren zur Direktmontage von Silizium-Sensoren und danach hergestellte Sensoren
DE19724026A1 (de) * 1997-06-06 1998-12-10 Siemens Ag Drucksensor-Bauelement und Verfahren zur Herstellung
US6274927B1 (en) * 1999-06-03 2001-08-14 Amkor Technology, Inc. Plastic package for an optical integrated circuit device and method of making
US6420204B2 (en) 1999-06-03 2002-07-16 Amkor Technology, Inc. Method of making a plastic package for an optical integrated circuit device
US6861720B1 (en) 2001-08-29 2005-03-01 Amkor Technology, Inc. Placement template and method for placing optical dies
US6784534B1 (en) 2002-02-06 2004-08-31 Amkor Technology, Inc. Thin integrated circuit package having an optically transparent window
DE10322751B3 (de) * 2003-05-19 2004-09-30 X-Fab Semiconductor Foundries Ag Verfahren zur Herstellung eines in Kunststoff verschlossenen optoelektronischen Bauelementes
WO2004105117A3 (de) * 2003-05-19 2005-02-03 X Fab Semiconductor Foundries Herstellen eines in kunststoff eingekapselten optoelektronischen bauelementes und zugehoerige verfahren
WO2005119756A1 (en) * 2004-06-04 2005-12-15 Melexis Nv Semiconductor package with transparent lid
WO2008082565A1 (en) * 2006-12-29 2008-07-10 Tessera, Inc. Microelectronic devices and methods of manufacturing such devices
US11699647B2 (en) 2021-04-15 2023-07-11 Infineon Technologies Ag Pre-molded lead frames for semiconductor packages

Also Published As

Publication number Publication date
JPH0653462A (ja) 1994-02-25
TW222713B (enrdf_load_stackoverflow) 1994-04-21
KR940001333A (ko) 1994-01-11

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