DE4238438A1 - Semiconductor component - comprises chip with bonding sites, base with hollow to house chip and lid on upper surface of chip - Google Patents

Semiconductor component - comprises chip with bonding sites, base with hollow to house chip and lid on upper surface of chip

Info

Publication number
DE4238438A1
DE4238438A1 DE19924238438 DE4238438A DE4238438A1 DE 4238438 A1 DE4238438 A1 DE 4238438A1 DE 19924238438 DE19924238438 DE 19924238438 DE 4238438 A DE4238438 A DE 4238438A DE 4238438 A1 DE4238438 A1 DE 4238438A1
Authority
DE
Germany
Prior art keywords
chip
lid
semiconductor device
semiconductor
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
DE19924238438
Other languages
German (de)
English (en)
Inventor
Jin Sung You
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SK Hynix Inc
Original Assignee
Goldstar Electron Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Goldstar Electron Co Ltd filed Critical Goldstar Electron Co Ltd
Publication of DE4238438A1 publication Critical patent/DE4238438A1/de
Ceased legal-status Critical Current

Links

Classifications

    • H10W76/12—
    • H10W76/15—
    • H10W76/153—
    • H10W76/18—
    • H10W72/073—
    • H10W72/07337—
    • H10W72/354—
    • H10W72/536—
    • H10W72/5363—
    • H10W72/552—
    • H10W74/00—
    • H10W90/756—

Landscapes

  • Lead Frames For Integrated Circuits (AREA)
  • Die Bonding (AREA)
  • Wire Bonding (AREA)
DE19924238438 1992-01-14 1992-11-13 Semiconductor component - comprises chip with bonding sites, base with hollow to house chip and lid on upper surface of chip Ceased DE4238438A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019920000421A KR0157857B1 (ko) 1992-01-14 1992-01-14 반도체 패키지

Publications (1)

Publication Number Publication Date
DE4238438A1 true DE4238438A1 (en) 1993-07-15

Family

ID=19327846

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19924238438 Ceased DE4238438A1 (en) 1992-01-14 1992-11-13 Semiconductor component - comprises chip with bonding sites, base with hollow to house chip and lid on upper surface of chip

Country Status (5)

Country Link
US (1) US5326932A (cg-RX-API-DMAC10.html)
JP (1) JP3110174B2 (cg-RX-API-DMAC10.html)
KR (1) KR0157857B1 (cg-RX-API-DMAC10.html)
DE (1) DE4238438A1 (cg-RX-API-DMAC10.html)
TW (1) TW262583B (cg-RX-API-DMAC10.html)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19520676A1 (de) * 1995-06-07 1996-12-12 Deutsche Telekom Ag Hybridschaltung und Verfahren zur Herstellung derselben
US5694344A (en) * 1995-06-15 1997-12-02 Motorola, Inc. Method for electrically modeling a semiconductor package
KR0179924B1 (ko) * 1996-06-14 1999-03-20 문정환 버텀리드 반도체 패키지
KR100206910B1 (ko) * 1996-06-14 1999-07-01 구본준 반도체 패키지의 디플래쉬 방법
KR0179925B1 (ko) * 1996-06-14 1999-03-20 문정환 리드프레임 및 그를 이용한 버텀 리드 반도체 패키지
US6335225B1 (en) 1998-02-20 2002-01-01 Micron Technology, Inc. High density direct connect LOC assembly
US6133634A (en) * 1998-08-05 2000-10-17 Fairchild Semiconductor Corporation High performance flip chip package
FR2819936B1 (fr) * 2001-01-22 2003-05-30 St Microelectronics Sa Procede de fabrication d'un boitier semi-conducteur et boitier semi-conducteur a puces de circuits integres
US6981230B1 (en) 2002-07-30 2005-12-27 Apache Design Solutions, Inc. On-chip power-ground inductance modeling using effective self-loop-inductance

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5138436A (en) * 1990-11-16 1992-08-11 Ball Corporation Interconnect package having means for waveguide transmission of rf signals
US5139968A (en) * 1989-03-03 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Method of producing a t-shaped gate electrode
US5159434A (en) * 1990-02-01 1992-10-27 Hitachi, Ltd. Semiconductor device having a particular chip pad structure
EP0516170A2 (en) * 1991-05-28 1992-12-02 Oki Electric Industry Co., Ltd. Semiconductor chip mounted circuit board assembly and method for manufacturing the same

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5139969A (en) * 1990-05-30 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Method of making resin molded semiconductor device
US5153379A (en) * 1990-10-09 1992-10-06 Motorola, Inc. Shielded low-profile electronic component assembly
US5136366A (en) * 1990-11-05 1992-08-04 Motorola, Inc. Overmolded semiconductor package with anchoring means
US5166772A (en) * 1991-02-22 1992-11-24 Motorola, Inc. Transfer molded semiconductor device package with integral shield
US5153385A (en) * 1991-03-18 1992-10-06 Motorola, Inc. Transfer molded semiconductor package with improved adhesion

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5139968A (en) * 1989-03-03 1992-08-18 Mitsubishi Denki Kabushiki Kaisha Method of producing a t-shaped gate electrode
US5159434A (en) * 1990-02-01 1992-10-27 Hitachi, Ltd. Semiconductor device having a particular chip pad structure
US5138436A (en) * 1990-11-16 1992-08-11 Ball Corporation Interconnect package having means for waveguide transmission of rf signals
EP0516170A2 (en) * 1991-05-28 1992-12-02 Oki Electric Industry Co., Ltd. Semiconductor chip mounted circuit board assembly and method for manufacturing the same

Non-Patent Citations (7)

* Cited by examiner, † Cited by third party
Title
3-116383 A. E-1099, Aug. 12,1991,Vol.15,No.315 *
3-154344 A. E-1116, Sept.27,1991,Vol.15,No.383 *
3-313969 A. E- 898, March 5,1990,Vol.14,No.117 *
et.al.: Double Layer Recessed Hybrid Flip Chip on Board. In: MOTOROLA, Vol.11, Oc 1990, S.158-159 *
N.N.: Thin Film Module. In: IBM Technical Dis- closure Bulletin, Vol.31,No.8,Jan.1989, S.135-138 *
PAPAGEORGE,Marc *
Patents Abstracts of Japan: 3-105924 A. E-1094, July 26,1991,Vol.15,No.295 *

Also Published As

Publication number Publication date
KR930017154A (ko) 1993-08-30
US5326932A (en) 1994-07-05
JPH05343558A (ja) 1993-12-24
KR0157857B1 (ko) 1998-12-01
JP3110174B2 (ja) 2000-11-20
TW262583B (cg-RX-API-DMAC10.html) 1995-11-11

Similar Documents

Publication Publication Date Title
DE69527330T2 (de) Halbleiteranordnung und Herstellungsverfahren
DE69621851T2 (de) Mehrchipanlage und sandwich-typ verfahren zur herstellung durch verwendung von leitern
DE19733702B4 (de) Halbleitergehäuse und Verfahren zur Herstellung eines Halbleitergehäuses
DE4238646B4 (de) Halbleiter-Bauelement mit spezieller Anschlusskonfiguration
DE3786861T2 (de) Halbleiteranordnung mit Gehäuse mit Kühlungsmitteln.
DE69327765T2 (de) Leiterplatte mit darauf montierten elektrischen Bauelementen
DE102008046095B4 (de) Verfahren zum vereinzeln eines halbleiterbausteins
DE19747105A1 (de) Bauelement mit gestapelten Halbleiterchips
DE4021871C2 (de) Hochintegriertes elektronisches Bauteil
DE69524855T2 (de) Bauelementstapel in mehrchiphalbleiterpackungen
DE3428881A1 (de) Verfahren zum herstellen einer integrierten schaltungsvorrichtung
DE4301915A1 (de) Mehrfachchip-Halbleitervorrichtung
EP0777955A1 (de) Gerät mit einer elektrischen schaltungsanordnung
DE69004581T2 (de) Plastikumhüllte Hybrid-Halbleiteranordnung.
DE69524724T2 (de) Elektronische schaltungspackung
EP0951692A1 (de) Trägerelement für einen halbleiterchip zum einbau in chipkarten
DE19709259B4 (de) Mehrlagiges Bodenanschlussgehäuse
DE4316639A1 (de) Halbleitervorrichtung und Verfahren zu ihrer Herstellung
DE69417329T2 (de) In Harz versiegelte Halbleiteranordnung
DE4238438A1 (en) Semiconductor component - comprises chip with bonding sites, base with hollow to house chip and lid on upper surface of chip
DE10301510B4 (de) Verfahren zur Herstellung eines Verkleinerten Chippakets
DE112022003837T5 (de) Halbleitervorrichtung und herstellungsverfahren
DE3930858C2 (de) Modulaufbau
DE4423561A1 (de) Oberflächenmontage-Elektronikbauteil mit Schmelzsicherung
DE112006000954B4 (de) Halbleiterpaket und Verfahren zur Herstellung

Legal Events

Date Code Title Description
OM8 Search report available as to paragraph 43 lit. 1 sentence 1 patent law
8110 Request for examination paragraph 44
R011 All appeals rejected, refused or otherwise settled
R003 Refusal decision now final

Effective date: 20120502