DE3942656C2 - - Google Patents
Info
- Publication number
- DE3942656C2 DE3942656C2 DE3942656A DE3942656A DE3942656C2 DE 3942656 C2 DE3942656 C2 DE 3942656C2 DE 3942656 A DE3942656 A DE 3942656A DE 3942656 A DE3942656 A DE 3942656A DE 3942656 C2 DE3942656 C2 DE 3942656C2
- Authority
- DE
- Germany
- Prior art keywords
- voltage
- vcc
- capacitor
- electrode
- circuit arrangement
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000003990 capacitor Substances 0.000 claims description 61
- 230000032683 aging Effects 0.000 claims description 32
- 238000012360 testing method Methods 0.000 claims description 30
- 230000005540 biological transmission Effects 0.000 claims description 21
- 239000012212 insulator Substances 0.000 claims description 18
- 238000009413 insulation Methods 0.000 claims description 11
- 230000001419 dependent effect Effects 0.000 claims description 7
- 238000001514 detection method Methods 0.000 claims description 5
- 238000000034 method Methods 0.000 claims description 4
- 230000006870 function Effects 0.000 claims 6
- 238000010586 diagram Methods 0.000 description 8
- 230000004044 response Effects 0.000 description 6
- 241000220317 Rosa Species 0.000 description 2
- 230000002431 foraging effect Effects 0.000 description 2
- 230000007547 defect Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 210000001550 testis Anatomy 0.000 description 1
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
- G11C29/50008—Marginal testing, e.g. race, voltage or current testing of impedance
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
- G11C29/50—Marginal testing, e.g. race, voltage or current testing
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP63332237A JPH02177194A (ja) | 1988-12-28 | 1988-12-28 | ダイナミックランダムアクセスメモリ装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| DE3942656A1 DE3942656A1 (de) | 1990-07-05 |
| DE3942656C2 true DE3942656C2 (ja) | 1991-05-02 |
Family
ID=18252710
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DE3942656A Granted DE3942656A1 (de) | 1988-12-28 | 1989-12-22 | Verbesserte dynamische halbleiterspeichereinrichtung und verfahren fuer einen verbesserten alterungstest der speicherzellen |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US5079743A (ja) |
| JP (1) | JPH02177194A (ja) |
| DE (1) | DE3942656A1 (ja) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4201516A1 (de) * | 1991-08-23 | 1993-02-25 | Samsung Electronics Co Ltd | Vorrichtung zum automatischen testen eines beanspruchungsbetriebes einer halbleiterspeichervorrichtung |
Families Citing this family (18)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5264743A (en) * | 1989-12-08 | 1993-11-23 | Hitachi, Ltd. | Semiconductor memory operating with low supply voltage |
| JP3050326B2 (ja) * | 1990-11-30 | 2000-06-12 | 日本電気株式会社 | 半導体集積回路 |
| JP2972384B2 (ja) * | 1991-06-06 | 1999-11-08 | 日本電気アイシーマイコンシステム株式会社 | 半導体メモリ装置 |
| JPH0567399A (ja) * | 1991-06-28 | 1993-03-19 | Mitsubishi Electric Corp | バーンインモード確認手段を有する半導体記憶装置 |
| JPH0757472A (ja) * | 1993-08-13 | 1995-03-03 | Nec Corp | 半導体集積回路装置 |
| JPH07260874A (ja) * | 1994-03-18 | 1995-10-13 | Fujitsu Ltd | 半導体装置及びその試験方法 |
| US5508962A (en) * | 1994-06-29 | 1996-04-16 | Texas Instruments Incorporated | Apparatus and method for an active field plate bias generator |
| US5500824A (en) * | 1995-01-18 | 1996-03-19 | Micron Technology, Inc. | Adjustable cell plate generator |
| US5787044A (en) * | 1995-10-23 | 1998-07-28 | Micron Technology, Inc. | Memory-cell array and a method for repairing the same |
| DE19631361A1 (de) * | 1996-08-02 | 1998-02-05 | Siemens Ag | Verfahren zur Herstellung von integrierten kapazitiven Strukturen |
| JPH10106286A (ja) * | 1996-09-24 | 1998-04-24 | Mitsubishi Electric Corp | 半導体記憶装置およびそのテスト方法 |
| KR19980034731A (ko) * | 1996-11-08 | 1998-08-05 | 김영환 | 반도체 메모리 소자의 스트레스 테스트 장치 및 그 방법 |
| JPH10199296A (ja) * | 1997-01-09 | 1998-07-31 | Mitsubishi Electric Corp | ダイナミック型半導体記憶装置およびそのテスト方法 |
| US5822258A (en) | 1997-05-05 | 1998-10-13 | Micron Technology, Inc. | Circuit and method for testing a memory device with a cell plate generator having a variable current |
| DE10043218C2 (de) * | 2000-09-01 | 2003-04-24 | Infineon Technologies Ag | Schaltungsanordnung und Verfahren zur Alterungsbeschleunigung bei einem MRAM |
| JP2002231000A (ja) * | 2001-02-05 | 2002-08-16 | Mitsubishi Electric Corp | 半導体記憶装置 |
| JP4823833B2 (ja) * | 2006-09-25 | 2011-11-24 | 住友電工デバイス・イノベーション株式会社 | 電子装置の製造方法および電子装置の制御方法 |
| JP2011249679A (ja) * | 2010-05-28 | 2011-12-08 | Elpida Memory Inc | 半導体装置 |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4507761A (en) * | 1982-04-20 | 1985-03-26 | Mostek Corporation | Functional command for semiconductor memory |
| US4527254A (en) * | 1982-11-15 | 1985-07-02 | International Business Machines Corporation | Dynamic random access memory having separated VDD pads for improved burn-in |
| GB2138230B (en) * | 1983-04-12 | 1986-12-03 | Sony Corp | Dynamic random access memory arrangements |
| US4634890A (en) * | 1984-09-06 | 1987-01-06 | Thomson Components-Mostek Corporation | Clamping circuit finding particular application between a single sided output of a computer memory and a differential amplifier sensing circuit |
| US4755964A (en) * | 1985-04-19 | 1988-07-05 | American Telephone And Telegraph Company | Memory control circuit permitting microcomputer system to utilize static and dynamic rams |
| JPH0789433B2 (ja) * | 1985-11-22 | 1995-09-27 | 株式会社日立製作所 | ダイナミツク型ｒａｍ |
| JPS62192998A (ja) * | 1986-02-19 | 1987-08-24 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US4764900A (en) * | 1986-03-24 | 1988-08-16 | Motorola, Inc. | High speed write technique for a memory |
| JP2721151B2 (ja) * | 1986-04-01 | 1998-03-04 | 株式会社東芝 | 半導体集積回路装置 |
| JPS62252559A (ja) * | 1986-04-24 | 1987-11-04 | Sanyo Electric Co Ltd | 往復型カセツト式テ−プレコ−ダ−の再生方向切換装置 |
| JPS62252598A (ja) * | 1986-04-24 | 1987-11-04 | Mitsubishi Electric Corp | 半導体メモリ装置 |
| JPH081760B2 (ja) * | 1987-11-17 | 1996-01-10 | 三菱電機株式会社 | 半導体記憶装置 |
| US4852063A (en) * | 1987-11-23 | 1989-07-25 | Ford Aerospace & Communications Corporation | Programmable voltage offset circuit |
| KR900008554B1 (ko) * | 1988-04-23 | 1990-11-24 | 삼성전자 주식회사 | 메모리 동작모드 선택회로 |
| US4972102A (en) * | 1989-05-08 | 1990-11-20 | Motorola, Inc. | Single-ended sense amplifier with dual feedback and a latching disable mode that saves power |
-
1988
- 1988-12-28 JP JP63332237A patent/JPH02177194A/ja active Pending
-
1989
- 1989-11-15 US US07/436,587 patent/US5079743A/en not_active Expired - Lifetime
- 1989-12-22 DE DE3942656A patent/DE3942656A1/de active Granted
-
1993
- 1993-03-17 US US08/032,554 patent/US5337272A/en not_active Expired - Lifetime
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| DE4201516A1 (de) * | 1991-08-23 | 1993-02-25 | Samsung Electronics Co Ltd | Vorrichtung zum automatischen testen eines beanspruchungsbetriebes einer halbleiterspeichervorrichtung |
Also Published As
| Publication number | Publication date |
|---|---|
| US5079743A (en) | 1992-01-07 |
| JPH02177194A (ja) | 1990-07-10 |
| DE3942656A1 (de) | 1990-07-05 |
| US5337272A (en) | 1994-08-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| DE3942656C2 (ja) | ||
| DE3903714C2 (ja) | ||
| DE4126474C2 (ja) | ||
| DE3908723C2 (ja) | ||
| DE4140846C2 (de) | Halbleiterspeichereinrichtung und Betriebsverfahren | |
| DE3827287C2 (ja) | ||
| DE4003824C2 (ja) | ||
| DE4214970C2 (de) | Halbleiterspeichereinrichtung und Betriebsverfahren dafür | |
| DE4002664C2 (ja) | ||
| DE4022153C2 (ja) | ||
| DE4129875C2 (ja) | ||
| DE4333765C2 (de) | Halbleiterspeichervorrichtung | |
| DE4314321A1 (de) | Impulserzeugungsschaltung und Halbleiterspeichereinrichtung mit dieser Impulserzeugungsschaltung | |
| DE4317887A1 (de) | Dynamische Speichervorrichtung für wahlfreien Zugriff mit Selbst-Refresh-Funktion | |
| DE2527486B2 (de) | Verfahren zur Prüfung bistabiler Speicherzellen | |
| DE19749360A1 (de) | Speicherzellen mit mehreren Ein-Ausgabeports und Speicher mit paralleler Dateninitialisierung | |
| DE4011935C2 (ja) | ||
| DE10042388A1 (de) | Nichtflüchtiger ferroelektrischer Speicher | |
| DE4108996C2 (de) | Halbleiterspeichereinrichtung | |
| DE4226710C2 (de) | Halbleiterspeichereinrichtung und Betriebsverfahren für eine Halbleiterspeichereinrichtung | |
| EP0282976A1 (de) | Verfahren und Schaltungsanordnung zum parallelen Einschreiben von Daten in einen Halbleiterspeicher | |
| DE19757889A1 (de) | Halbleiterspeichereinrichtung mit Testmodus | |
| DE4041408C2 (ja) | ||
| DE10300715A1 (de) | Halbleiterspeicherbauelement mit Signalverzögerung | |
| DE10247434A1 (de) | Halbleiterspeichervorrichtung mit Datenbuspaaren für das Datenschreiben und das Datenlesen |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| OP8 | Request for examination as to paragraph 44 patent law | ||
| D2 | Grant after examination | ||
| 8364 | No opposition during term of opposition | ||
| 8320 | Willingness to grant licences declared (paragraph 23) | ||
| 8339 | Ceased/non-payment of the annual fee |