DE3856168T2 - Halbleiterchippackung - Google Patents

Halbleiterchippackung

Info

Publication number
DE3856168T2
DE3856168T2 DE3856168T DE3856168T DE3856168T2 DE 3856168 T2 DE3856168 T2 DE 3856168T2 DE 3856168 T DE3856168 T DE 3856168T DE 3856168 T DE3856168 T DE 3856168T DE 3856168 T2 DE3856168 T2 DE 3856168T2
Authority
DE
Germany
Prior art keywords
semiconductor chip
chip package
package
semiconductor
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3856168T
Other languages
English (en)
Other versions
DE3856168D1 (de
Inventor
Richard K Spielberger
Thomas J Dunaway
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electronics Co Ltd
Original Assignee
Samsung Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electronics Co Ltd filed Critical Samsung Electronics Co Ltd
Application granted granted Critical
Publication of DE3856168D1 publication Critical patent/DE3856168D1/de
Publication of DE3856168T2 publication Critical patent/DE3856168T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5382—Adaptable interconnections, e.g. for engineering changes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1517—Multilayer substrate
    • H01L2924/15172—Fan-out arrangement of the internal vias
    • H01L2924/15173—Fan-out arrangement of the internal vias in a single layer of the multilayer substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3011—Impedance

Landscapes

  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Lead Frames For Integrated Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
DE3856168T 1987-10-23 1988-10-18 Halbleiterchippackung Expired - Lifetime DE3856168T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11285187A 1987-10-23 1987-10-23

Publications (2)

Publication Number Publication Date
DE3856168D1 DE3856168D1 (de) 1998-05-20
DE3856168T2 true DE3856168T2 (de) 1998-11-26

Family

ID=22346175

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3856168T Expired - Lifetime DE3856168T2 (de) 1987-10-23 1988-10-18 Halbleiterchippackung

Country Status (5)

Country Link
EP (1) EP0312975B1 (de)
JP (1) JP2584298B2 (de)
KR (1) KR970006535B1 (de)
CA (1) CA1315019C (de)
DE (1) DE3856168T2 (de)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5893200A (ja) * 1981-11-27 1983-06-02 Yokogawa Hokushin Electric Corp パルス状ｘ線発生装置
US4933741A (en) * 1988-11-14 1990-06-12 Motorola, Inc. Multifunction ground plane
FR2647962B1 (fr) * 1989-05-30 1994-04-15 Thomson Composants Milit Spatiau Circuit electronique en boitier avec puce sur zone quadrillee de plots conducteurs
US5060116A (en) * 1990-04-20 1991-10-22 Grobman Warren D Electronics system with direct write engineering change capability
US5250844A (en) * 1990-09-17 1993-10-05 Motorola, Inc. Multiple power/ground planes for tab
KR970053748A (ko) * 1995-12-30 1997-07-31 황인길 반도체 패키지의 리드프레임
KR100342813B1 (ko) * 1996-11-28 2002-11-30 앰코 테크놀로지 코리아 주식회사 접지선및전원선을갖는에어리어어레이범프드반도체패키지

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4245273A (en) * 1979-06-29 1981-01-13 International Business Machines Corporation Package for mounting and interconnecting a plurality of large scale integrated semiconductor devices
JPS6148994A (ja) * 1984-08-17 1986-03-10 株式会社日立製作所 モジユ−ル基板

Also Published As

Publication number Publication date
EP0312975A3 (de) 1990-10-03
KR970006535B1 (en) 1997-04-29
CA1315019C (en) 1993-03-23
EP0312975B1 (de) 1998-04-15
KR890007405A (ko) 1989-06-19
EP0312975A2 (de) 1989-04-26
DE3856168D1 (de) 1998-05-20
JPH021148A (ja) 1990-01-05
JP2584298B2 (ja) 1997-02-26

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition