DE3853980D1 - Taktsteuerung für digitale integrierte Schaltung hoher Geschwindigkeit. - Google Patents

Taktsteuerung für digitale integrierte Schaltung hoher Geschwindigkeit.

Info

Publication number
DE3853980D1
DE3853980D1 DE3853980T DE3853980T DE3853980D1 DE 3853980 D1 DE3853980 D1 DE 3853980D1 DE 3853980 T DE3853980 T DE 3853980T DE 3853980 T DE3853980 T DE 3853980T DE 3853980 D1 DE3853980 D1 DE 3853980D1
Authority
DE
Germany
Prior art keywords
integrated circuit
high speed
clock control
speed digital
digital integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE3853980T
Other languages
English (en)
Other versions
DE3853980T2 (de
Inventor
Kunio C O Patent Div Yoshihara
Toshiyuki C O Patent Di Terada
Chiaki C O Patent Divis Takubo
Nobuo Koide
Shoichi C O Patent Div Shimizu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3853980D1 publication Critical patent/DE3853980D1/de
Publication of DE3853980T2 publication Critical patent/DE3853980T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/04—Generating or distributing clock signals or signals derived directly therefrom
    • G06F1/12—Synchronisation of different clock signals provided by a plurality of clock generators

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Electronic Switches (AREA)
  • Shift Register Type Memory (AREA)
DE3853980T 1987-10-19 1988-10-19 Taktsteuerung für digitale integrierte Schaltung hoher Geschwindigkeit. Expired - Fee Related DE3853980T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62263138A JP2845438B2 (ja) 1987-10-19 1987-10-19 高速ディジタルｉｃ

Publications (2)

Publication Number Publication Date
DE3853980D1 true DE3853980D1 (de) 1995-07-20
DE3853980T2 DE3853980T2 (de) 1996-05-02

Family

ID=17385339

Family Applications (1)

Application Number Title Priority Date Filing Date
DE3853980T Expired - Fee Related DE3853980T2 (de) 1987-10-19 1988-10-19 Taktsteuerung für digitale integrierte Schaltung hoher Geschwindigkeit.

Country Status (4)

Country Link
US (1) US4926451A (de)
EP (1) EP0313337B1 (de)
JP (1) JP2845438B2 (de)
DE (1) DE3853980T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL8800872A (nl) * 1988-04-06 1989-11-01 Philips Nv Geintegreerde schakeling.
JP2504568B2 (ja) * 1989-06-20 1996-06-05 富士通株式会社 信号生成回路
JPH0771055B2 (ja) * 1990-08-20 1995-07-31 株式会社東芝 高速度信号多重化装置
JP2853894B2 (ja) * 1990-08-24 1999-02-03 三菱電機株式会社 分周回路及びパルス信号作成回路
JP2766941B2 (ja) * 1990-09-28 1998-06-18 株式会社日立製作所 クロック生成装置とデータ送受信装置及びその方法
GB9111179D0 (en) * 1991-05-23 1991-07-17 Motorola Gmbh An implementation of the ieee 1149.1 boundary-scan architecture
US5384494A (en) * 1993-04-13 1995-01-24 Hughes Aircraft Company Programmable hold-off for integrated circuit I/O pins
CA2127192C (en) * 1993-07-01 1999-09-07 Alan Brent Hussey Shaping ate bursts, particularly in gallium arsenide
US5487092A (en) * 1994-12-22 1996-01-23 International Business Machines Corporation System for high-speed synchronization across clock domains
SE503290C2 (sv) * 1995-03-31 1996-05-13 Ericsson Telefon Ab L M Anordning och förfarande för att inbördes synkronisera applikationsspecifika integrerade kretsar (ASIC)
US6166574A (en) * 1999-02-17 2000-12-26 Silicon Storage Technology, Inc. Circuit for turning on and off a clock without a glitch
US6489811B2 (en) * 2001-03-08 2002-12-03 Hiband Semiconductor, Inc. Logic gate with symmetrical propagation delay from any input to any output and a controlled output pulse width

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5017958A (de) * 1973-06-19 1975-02-25
US4041403A (en) * 1975-07-28 1977-08-09 Bell Telephone Laboratories, Incorporated Divide-by-N/2 frequency division arrangement
US4031476A (en) * 1976-05-12 1977-06-21 Rca Corporation Non-integer frequency divider having controllable error
US4035663A (en) * 1976-09-01 1977-07-12 Rockwell International Corporation Two phase clock synchronizing method and apparatus
JPS60146542A (ja) * 1984-01-10 1985-08-02 Mitsubishi Electric Corp 送信同期回路
JPS60154709A (ja) * 1984-01-25 1985-08-14 Toshiba Corp クロツク信号発生回路
JPS6215915A (ja) * 1985-07-15 1987-01-24 Matsushita Electric Ind Co Ltd ＧａＡｓ集積回路
JPS6297200A (ja) * 1985-10-23 1987-05-06 Nec Corp 制御メモリ

Also Published As

Publication number Publication date
DE3853980T2 (de) 1996-05-02
JPH01105398A (ja) 1989-04-21
US4926451A (en) 1990-05-15
EP0313337A3 (en) 1990-03-28
JP2845438B2 (ja) 1999-01-13
EP0313337A2 (de) 1989-04-26
EP0313337B1 (de) 1995-06-14

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Legal Events

Date Code Title Description
8327 Change in the person/name/address of the patent owner

Owner name: KABUSHIKI KAISHA TOSHIBA, KAWASAKI, KANAGAWA, JP T

8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee