DE3702006C2 - - Google Patents

Info

Publication number
DE3702006C2
DE3702006C2 DE3702006A DE3702006A DE3702006C2 DE 3702006 C2 DE3702006 C2 DE 3702006C2 DE 3702006 A DE3702006 A DE 3702006A DE 3702006 A DE3702006 A DE 3702006A DE 3702006 C2 DE3702006 C2 DE 3702006C2
Authority
DE
Germany
Prior art keywords
error
bit
unit
correction code
error correction
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
DE3702006A
Other languages
German (de)
English (en)
Other versions
DE3702006A1 (de
Inventor
Kunio Ooba
Tooru Kobe Hyogo Jp Kojima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from JP61071463A external-priority patent/JPS62226352A/ja
Priority claimed from JP61071464A external-priority patent/JPH0827763B2/ja
Priority claimed from JP61071462A external-priority patent/JPS62226353A/ja
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Publication of DE3702006A1 publication Critical patent/DE3702006A1/de
Application granted granted Critical
Publication of DE3702006C2 publication Critical patent/DE3702006C2/de
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/07—Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/08—Error detection or correction by redundancy in data representation, e.g. by using checking codes
    • G06F11/10—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
    • G06F11/1008—Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's in individual solid state devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/30—Monitoring
    • G06F11/34—Recording or statistical evaluation of computer activity, e.g. of down time, of input/output operation ; Recording or statistical evaluation of user activity, e.g. usability assessment

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)
  • For Increasing The Reliability Of Semiconductor Memories (AREA)
DE19873702006 1986-03-28 1987-01-23 Speichervorrichtung Granted DE3702006A1 (de)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP61071463A JPS62226352A (ja) 1986-03-28 1986-03-28 Ｒａｓ付記憶装置
JP61071464A JPH0827763B2 (ja) 1986-03-28 1986-03-28 Ｒａｓ回路付記憶装置
JP61071462A JPS62226353A (ja) 1986-03-28 1986-03-28 Ｒａｓ回路付記憶装置

Publications (2)

Publication Number Publication Date
DE3702006A1 DE3702006A1 (de) 1987-10-08
DE3702006C2 true DE3702006C2 (https=) 1989-11-30

Family

ID=27300646

Family Applications (1)

Application Number Title Priority Date Filing Date
DE19873702006 Granted DE3702006A1 (de) 1986-03-28 1987-01-23 Speichervorrichtung

Country Status (2)

Country Link
US (1) US4794597A (https=)
DE (1) DE3702006A1 (https=)

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US5195099A (en) * 1989-04-11 1993-03-16 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having improved error correcting circuit
US5864565A (en) 1993-06-15 1999-01-26 Micron Technology, Inc. Semiconductor integrated circuit having compression circuitry for compressing test data, and the test system and method for utilizing the semiconductor integrated circuit
JPH0764817A (ja) * 1993-08-30 1995-03-10 Mitsubishi Electric Corp 故障検出システム
US5745403A (en) * 1997-02-28 1998-04-28 Ramtron International Corporation System and method for mitigating imprint effect in ferroelectric random access memories utilizing a complementary data path
US6237116B1 (en) 1998-11-16 2001-05-22 Lockheed Martin Corporation Testing error correcting code feature in computers that do not have direct hardware features for causing single bit and multi-bit errors
JP4191355B2 (ja) 2000-02-10 2008-12-03 株式会社ルネサステクノロジ 半導体集積回路装置
US6799287B1 (en) * 2000-05-01 2004-09-28 Hewlett-Packard Development Company, L.P. Method and apparatus for verifying error correcting codes
JP2001351398A (ja) * 2000-06-12 2001-12-21 Nec Corp 記憶装置
JP4707803B2 (ja) * 2000-07-10 2011-06-22 エルピーダメモリ株式会社 エラーレート判定方法と半導体集積回路装置
US7051264B2 (en) * 2001-11-14 2006-05-23 Monolithic System Technology, Inc. Error correcting memory and method of operating same
US7032142B2 (en) * 2001-11-22 2006-04-18 Fujitsu Limited Memory circuit having parity cell array
US7116600B2 (en) 2004-02-19 2006-10-03 Micron Technology, Inc. Memory device having terminals for transferring multiple types of data
JP2005242797A (ja) * 2004-02-27 2005-09-08 Oki Electric Ind Co Ltd エラー訂正回路
JP4413091B2 (ja) * 2004-06-29 2010-02-10 株式会社ルネサステクノロジ 半導体装置
US7392456B2 (en) * 2004-11-23 2008-06-24 Mosys, Inc. Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memory
US10013371B2 (en) 2005-06-24 2018-07-03 Google Llc Configurable memory circuit system and method
US8244971B2 (en) 2006-07-31 2012-08-14 Google Inc. Memory circuit system and method
US20080082763A1 (en) 2006-10-02 2008-04-03 Metaram, Inc. Apparatus and method for power management of memory circuits by a system or component thereof
US8081474B1 (en) 2007-12-18 2011-12-20 Google Inc. Embossed heat spreader
US8089795B2 (en) 2006-02-09 2012-01-03 Google Inc. Memory module with memory stack and interface with enhanced capabilities
US8111566B1 (en) 2007-11-16 2012-02-07 Google, Inc. Optimal channel design for memory devices for providing a high-speed memory interface
US8077535B2 (en) 2006-07-31 2011-12-13 Google Inc. Memory refresh apparatus and method
US8397013B1 (en) 2006-10-05 2013-03-12 Google Inc. Hybrid memory module
US20080028136A1 (en) 2006-07-31 2008-01-31 Schakel Keith R Method and apparatus for refresh management of memory modules
US8796830B1 (en) 2006-09-01 2014-08-05 Google Inc. Stackable low-profile lead frame package
US9171585B2 (en) 2005-06-24 2015-10-27 Google Inc. Configurable memory circuit system and method
US8060774B2 (en) 2005-06-24 2011-11-15 Google Inc. Memory systems and memory modules
US8090897B2 (en) 2006-07-31 2012-01-03 Google Inc. System and method for simulating an aspect of a memory circuit
US7609567B2 (en) 2005-06-24 2009-10-27 Metaram, Inc. System and method for simulating an aspect of a memory circuit
US8335894B1 (en) 2008-07-25 2012-12-18 Google Inc. Configurable memory system with interface circuit
US8327104B2 (en) 2006-07-31 2012-12-04 Google Inc. Adjusting the timing of signals associated with a memory system
US8359187B2 (en) 2005-06-24 2013-01-22 Google Inc. Simulating a different number of memory circuit devices
US8386722B1 (en) 2008-06-23 2013-02-26 Google Inc. Stacked DIMM memory interface
GB2441726B (en) 2005-06-24 2010-08-11 Metaram Inc An integrated memory core and memory interface circuit
US8055833B2 (en) 2006-10-05 2011-11-08 Google Inc. System and method for increasing capacity, performance, and flexibility of flash storage
US8041881B2 (en) 2006-07-31 2011-10-18 Google Inc. Memory device with emulated characteristics
US8438328B2 (en) 2008-02-21 2013-05-07 Google Inc. Emulation of abstracted DIMMs using abstracted DRAMs
US8130560B1 (en) 2006-11-13 2012-03-06 Google Inc. Multi-rank partial width memory modules
US9507739B2 (en) 2005-06-24 2016-11-29 Google Inc. Configurable memory circuit system and method
US9542352B2 (en) 2006-02-09 2017-01-10 Google Inc. System and method for reducing command scheduling constraints of memory circuits
US7386656B2 (en) 2006-07-31 2008-06-10 Metaram, Inc. Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
JP5242397B2 (ja) 2005-09-02 2013-07-24 メタラム インコーポレイテッド Ｄｒａｍをスタックする方法及び装置
KR100625811B1 (ko) * 2005-12-09 2006-09-18 엠텍비젼 주식회사 코드 데이터 에러 정정 방법 및 장치
US9632929B2 (en) 2006-02-09 2017-04-25 Google Inc. Translating an address associated with a command communicated between a system and memory circuits
KR100743252B1 (ko) * 2006-04-11 2007-07-27 엠텍비젼 주식회사 코드 데이터 에러 정정 방법 및 장치
KR100743253B1 (ko) * 2006-04-11 2007-07-27 엠텍비젼 주식회사 코드 데이터 에러 정정 방법 및 장치
KR100743258B1 (ko) * 2006-04-11 2007-07-27 엠텍비젼 주식회사 코드 데이터 에러 정정 방법 및 장치
US7724589B2 (en) 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
JP4652308B2 (ja) * 2006-10-27 2011-03-16 富士通テン株式会社 エラー検出システム及びエラー検出方法
US8209479B2 (en) 2007-07-18 2012-06-26 Google Inc. Memory circuit system and method
US8080874B1 (en) 2007-09-14 2011-12-20 Google Inc. Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
WO2010144624A1 (en) 2009-06-09 2010-12-16 Google Inc. Programming of dimm termination resistance values
US8612834B2 (en) * 2011-03-08 2013-12-17 Intel Corporation Apparatus, system, and method for decoding linear block codes in a memory controller
US20150067437A1 (en) * 2013-08-30 2015-03-05 Kuljit S. Bains Apparatus, method and system for reporting dynamic random access memory error information
EP2863566B1 (en) 2013-10-18 2020-09-02 Université de Nantes Method and apparatus for reconstructing a data block
DE102015210651B4 (de) * 2015-06-10 2022-10-27 Infineon Technologies Ag Schaltung und Verfahren zum Testen einer Fehlerkorrektur-Fähigkeit
KR20190043043A (ko) * 2017-10-17 2019-04-25 에스케이하이닉스 주식회사 전자장치
US10625752B2 (en) * 2017-12-12 2020-04-21 Qualcomm Incorporated System and method for online functional testing for error-correcting code function
KR102784280B1 (ko) 2019-10-31 2025-03-21 삼성전자주식회사 메모리 컨트롤러, 메모리 시스템 및 메모리 모듈

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JPS6037934A (ja) * 1983-08-10 1985-02-27 Kosumosu Shokuhin:Kk 可溶性マイクロカプセル油

Also Published As

Publication number Publication date
DE3702006A1 (de) 1987-10-08
US4794597A (en) 1988-12-27

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
D2 Grant after examination
8364 No opposition during term of opposition
8328 Change in the person/name/address of the agent

Free format text: STREHL, P., DIPL.-ING. DIPL.-WIRTSCH.-ING. SCHUEBEL-HOPF, U., DIPL.-CHEM. DR.RER.NAT. GROENING, H.,DIPL.-ING., PAT.-ANWAELTE, 8000 MUENCHEN

8320 Willingness to grant licences declared (paragraph 23)
8339 Ceased/non-payment of the annual fee