DE3687785T2 - Integrierte schaltungen. - Google Patents

Integrierte schaltungen.

Info

Publication number
DE3687785T2
DE3687785T2 DE8686308590T DE3687785T DE3687785T2 DE 3687785 T2 DE3687785 T2 DE 3687785T2 DE 8686308590 T DE8686308590 T DE 8686308590T DE 3687785 T DE3687785 T DE 3687785T DE 3687785 T2 DE3687785 T2 DE 3687785T2
Authority
DE
Germany
Prior art keywords
integrated circuits
circuits
integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686308590T
Other languages
English (en)
Other versions
DE3687785D1 (de
Inventor
Norihisa Shirota
Shinji Takada
Kazuo Yamagiwa
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE3687785D1 publication Critical patent/DE3687785D1/de
Publication of DE3687785T2 publication Critical patent/DE3687785T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
    • G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
    • G06F13/4291—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using a clocked protocol

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
DE8686308590T 1985-11-05 1986-11-04 Integrierte schaltungen. Expired - Fee Related DE3687785T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60247551A JPH071496B2 (ja) 1985-11-05 1985-11-05 制御方法及び制御装置

Publications (2)

Publication Number Publication Date
DE3687785D1 DE3687785D1 (de) 1993-03-25
DE3687785T2 true DE3687785T2 (de) 1993-07-22

Family

ID=17165177

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686308590T Expired - Fee Related DE3687785T2 (de) 1985-11-05 1986-11-04 Integrierte schaltungen.

Country Status (7)

Country Link
US (1) US4769781A (de)
EP (1) EP0225720B1 (de)
JP (1) JPH071496B2 (de)
KR (1) KR950002707B1 (de)
AU (1) AU595549B2 (de)
CA (1) CA1270576A (de)
DE (1) DE3687785T2 (de)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB2211326B (en) * 1987-10-16 1991-12-11 Hitachi Ltd Address bus control apparatus
US5461718A (en) * 1992-04-24 1995-10-24 Digital Equipment Corporation System for sequential read of memory stream buffer detecting page mode cycles availability fetching data into a selected FIFO, and sending data without aceessing memory
DE69322372T2 (de) * 1993-04-06 1999-04-29 St Microelectronics Srl Für zwei verschiedene Protokollstandards geeignete Schnittstellenschaltung zwischen einem Steuerbus und einer integrierten Schaltung
CN101436170A (zh) * 2007-11-12 2009-05-20 鸿富锦精密工业（深圳）有限公司 Spi设备通信电路
CN109446124B (zh) * 2018-12-11 2024-03-19 西安热工研究院有限公司 一种火电机组马达及电磁阀类设备驱动级结构及方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4174536A (en) * 1977-01-21 1979-11-13 Massachusetts Institute Of Technology Digital communications controller with firmware control
US4309754A (en) * 1979-07-30 1982-01-05 International Business Machines Corp. Data interface mechanism for interfacing bit-parallel data buses of different bit width
US4306298A (en) * 1979-10-09 1981-12-15 Texas Instruments Incorporated Memory system for microprocessor with multiplexed address/data bus
NL8005976A (nl) 1980-10-31 1982-05-17 Philips Nv Tweedraads-bussysteem met een kloklijndraad en een datalijndraad voor het onderling verbinden van een aantal stations.
US4449202A (en) * 1981-12-04 1984-05-15 Ncr Corporation Full duplex integrated circuit communication controller

Also Published As

Publication number Publication date
CA1270576A (en) 1990-06-19
KR950002707B1 (ko) 1995-03-24
AU595549B2 (en) 1990-04-05
AU6446686A (en) 1987-05-07
EP0225720B1 (de) 1993-02-17
JPH071496B2 (ja) 1995-01-11
KR870005303A (ko) 1987-06-08
EP0225720A3 (en) 1989-07-26
EP0225720A2 (de) 1987-06-16
JPS62107357A (ja) 1987-05-18
DE3687785D1 (de) 1993-03-25
US4769781A (en) 1988-09-06

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee