DE3685107D1 - Speicherverbunder wellenfront-feldprozessor. - Google Patents

Speicherverbunder wellenfront-feldprozessor.

Info

Publication number
DE3685107D1
DE3685107D1 DE8686906519T DE3685107T DE3685107D1 DE 3685107 D1 DE3685107 D1 DE 3685107D1 DE 8686906519 T DE8686906519 T DE 8686906519T DE 3685107 T DE3685107 T DE 3685107T DE 3685107 D1 DE3685107 D1 DE 3685107D1
Authority
DE
Germany
Prior art keywords
wave front
front field
field processor
memory connector
connector wave
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8686906519T
Other languages
English (en)
Inventor
Quentin E Dolecek
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Johns Hopkins University
Original Assignee
Johns Hopkins University
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Johns Hopkins University filed Critical Johns Hopkins University
Application granted granted Critical
Publication of DE3685107D1 publication Critical patent/DE3685107D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/76Architectures of general purpose stored program computers
    • G06F15/80Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8046Systolic arrays
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00Digital computers in general; Data processing equipment in general
    • G06F15/16Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163Interprocessor communication
    • G06F15/173Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G06F15/17356Indirect interconnection networks
    • G06F15/17368Indirect interconnection networks non hierarchical topologies
    • G06F15/17381Two dimensional, e.g. mesh, torus
DE8686906519T 1985-09-17 1986-09-17 Speicherverbunder wellenfront-feldprozessor. Expired - Fee Related DE3685107D1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US06/777,112 US4720780A (en) 1985-09-17 1985-09-17 Memory-linked wavefront array processor
PCT/US1986/001903 WO1987001841A1 (en) 1985-09-17 1986-09-17 Memory-linked wavefront array processor

Publications (1)

Publication Number Publication Date
DE3685107D1 true DE3685107D1 (de) 1992-06-04

Family

ID=25109328

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8686906519T Expired - Fee Related DE3685107D1 (de) 1985-09-17 1986-09-17 Speicherverbunder wellenfront-feldprozessor.

Country Status (6)

Country Link
US (2) US4720780A (de)
EP (1) EP0237571B1 (de)
JP (1) JPS63501530A (de)
KR (1) KR970001899B1 (de)
DE (1) DE3685107D1 (de)
WO (1) WO1987001841A1 (de)

Families Citing this family (241)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0576749B1 (de) * 1992-06-30 1999-06-02 Discovision Associates Datenpipelinesystem
JPS625465A (ja) * 1985-07-01 1987-01-12 Akira Nakano 情報処理ユニツトおよびマルチ情報処理ユニツトシステム
US4807183A (en) * 1985-09-27 1989-02-21 Carnegie-Mellon University Programmable interconnection chip for computer system functional modules
CA1283738C (en) * 1985-11-13 1991-04-30 Atsushi Hasebe Data processor
US4907148A (en) * 1985-11-13 1990-03-06 Alcatel U.S.A. Corp. Cellular array processor with individual cell-level data-dependent cell control and multiport input memory
NL8600218A (nl) * 1986-01-30 1987-08-17 Philips Nv Netwerk van dataverwerkingsstations.
GB8618943D0 (en) * 1986-08-02 1986-09-10 Int Computers Ltd Data processing apparatus
GB2211638A (en) * 1987-10-27 1989-07-05 Ibm Simd array processor
US4933836A (en) * 1986-10-29 1990-06-12 United Technologies Corporation n-Dimensional modular multiprocessor lattice architecture
US5012441A (en) * 1986-11-24 1991-04-30 Zoran Corporation Apparatus for addressing memory with data word and data block reversal capability
US4797806A (en) * 1987-02-19 1989-01-10 Gtx Corporation High speed serial pixel neighborhood processor and method
US4891751A (en) * 1987-03-27 1990-01-02 Floating Point Systems, Inc. Massively parallel vector processing computer
US5226128A (en) * 1987-05-01 1993-07-06 Hewlett-Packard Company Horizontal computer having register multiconnect for execution of a loop with a branch
US5036454A (en) * 1987-05-01 1991-07-30 Hewlett-Packard Company Horizontal computer having register multiconnect for execution of a loop with overlapped code
US5083267A (en) * 1987-05-01 1992-01-21 Hewlett-Packard Company Horizontal computer having register multiconnect for execution of an instruction loop with recurrance
US5276819A (en) * 1987-05-01 1994-01-04 Hewlett-Packard Company Horizontal computer having register multiconnect for operand address generation during execution of iterations of a loop of program code
US4933895A (en) * 1987-07-10 1990-06-12 Hughes Aircraft Company Cellular array having data dependent processing capabilities
US4908751A (en) * 1987-10-15 1990-03-13 Smith Harry F Parallel data processor
US5115510A (en) * 1987-10-20 1992-05-19 Sharp Kabushiki Kaisha Multistage data flow processor with instruction packet, fetch, storage transmission and address generation controlled by destination information
US5278781A (en) * 1987-11-12 1994-01-11 Matsushita Electric Industrial Co., Ltd. Digital signal processing system
US4975870A (en) * 1988-02-25 1990-12-04 Data General Corporation Apparatus for locking a portion of a computer memory
US4896265A (en) * 1988-03-28 1990-01-23 General Electric Company Parallel broadcasting method and apparatus
JPH01261772A (ja) * 1988-04-08 1989-10-18 Cogent Res Inc コンピュータ及びその動作方法
WO1989011129A1 (en) * 1988-05-10 1989-11-16 Cray Research, Inc. Vector tailgating in computers with vector registers
JPH0254383A (ja) * 1988-08-18 1990-02-23 Mitsubishi Electric Corp アレイプロセッサ
EP0360527B1 (de) * 1988-09-19 1995-01-04 Fujitsu Limited Paralleles Rechnersystem mit Verwendung eines SIMD-Verfahrens
JP2930341B2 (ja) * 1988-10-07 1999-08-03 マーチン・マリエッタ・コーポレーション データ並列処理装置
US4984192A (en) * 1988-12-02 1991-01-08 Ultrasystems Defense Inc. Programmable state machines connectable in a reconfiguration switching network for performing real-time data processing
JPH02178808A (ja) * 1988-12-29 1990-07-11 Yaskawa Electric Mfg Co Ltd ロボットの制御方法
US5072371A (en) * 1989-03-01 1991-12-10 The United States Of America As Represented By The United States Department Of Energy Method for simultaneous overlapped communications between neighboring processors in a multiple
US5168572A (en) * 1989-03-10 1992-12-01 The Boeing Company System for dynamic selection of globally-determined optimal data path
US5689647A (en) * 1989-03-14 1997-11-18 Sanyo Electric Co., Ltd. Parallel computing system with processing element number setting mode and shortest route determination with matrix size information
US5101480A (en) * 1989-05-09 1992-03-31 The University Of Michigan Hexagonal mesh multiprocessor system
US5142686A (en) * 1989-10-20 1992-08-25 United Technologies Corporation Multiprocessor system having processors and switches with each pair of processors connected through a single switch using Latin square matrix
US5179530A (en) * 1989-11-03 1993-01-12 Zoran Corporation Architecture for integrated concurrent vector signal processor
EP0428770B1 (de) * 1989-11-21 1995-02-01 Deutsche ITT Industries GmbH Datengesteuerter Arrayprozessor
US5121502A (en) * 1989-12-20 1992-06-09 Hewlett-Packard Company System for selectively communicating instructions from memory locations simultaneously or from the same memory locations sequentially to plurality of processing
US5197130A (en) * 1989-12-29 1993-03-23 Supercomputer Systems Limited Partnership Cluster architecture for a highly parallel scalar/vector multiprocessor system
GB9008366D0 (en) * 1990-04-12 1990-06-13 British Aerospace Data interaction architecture(dia)for real time embedded multi processor systems
EP0453863A2 (de) * 1990-04-27 1991-10-30 National Semiconductor Corporation Verfahren und Gerät zur Ausführung einer Mediumzugriffssteuerung/Wirtsystemschnittstelle
US5157785A (en) * 1990-05-29 1992-10-20 Wavetracer, Inc. Process cell for an n-dimensional processor array having a single input element with 2n data inputs, memory, and full function arithmetic logic unit
US5133073A (en) * 1990-05-29 1992-07-21 Wavetracer, Inc. Processor array of N-dimensions which is physically reconfigurable into N-1
US5193202A (en) * 1990-05-29 1993-03-09 Wavetracer, Inc. Processor array with relocated operand physical address generator capable of data transfer to distant physical processor for each virtual processor while simulating dimensionally larger array processor
WO1991019256A1 (en) * 1990-05-30 1991-12-12 Adaptive Solutions, Inc. Mechanism providing concurrent computational/communications in simd architecture
US5430862A (en) * 1990-06-29 1995-07-04 Bull Hn Information Systems Inc. Emulation of CISC instructions by RISC instructions using two pipelined stages for overlapped CISC decoding and RISC execution
GB9018048D0 (en) * 1990-08-16 1990-10-03 Secr Defence Digital processor for simulating operation of a parallel processing array
US5206952A (en) * 1990-09-12 1993-04-27 Cray Research, Inc. Fault tolerant networking architecture
US5809292A (en) * 1990-11-13 1998-09-15 International Business Machines Corporation Floating point for simid array machine
ATE180586T1 (de) * 1990-11-13 1999-06-15 Ibm Paralleles assoziativprozessor-system
US5963746A (en) * 1990-11-13 1999-10-05 International Business Machines Corporation Fully distributed processing memory element
US5963745A (en) * 1990-11-13 1999-10-05 International Business Machines Corporation APAP I/O programmable router
US5966528A (en) * 1990-11-13 1999-10-12 International Business Machines Corporation SIMD/MIMD array processor with vector processing
US5794059A (en) * 1990-11-13 1998-08-11 International Business Machines Corporation N-dimensional modified hypercube
US5590345A (en) * 1990-11-13 1996-12-31 International Business Machines Corporation Advanced parallel array processor(APAP)
US5625836A (en) * 1990-11-13 1997-04-29 International Business Machines Corporation SIMD/MIMD processing memory element (PME)
US5617577A (en) * 1990-11-13 1997-04-01 International Business Machines Corporation Advanced parallel array processor I/O connection
US5630162A (en) * 1990-11-13 1997-05-13 International Business Machines Corporation Array processor dotted communication network based on H-DOTs
US5815723A (en) * 1990-11-13 1998-09-29 International Business Machines Corporation Picket autonomy on a SIMD machine
US5828894A (en) * 1990-11-13 1998-10-27 International Business Machines Corporation Array processor having grouping of SIMD pickets
US5765012A (en) * 1990-11-13 1998-06-09 International Business Machines Corporation Controller for a SIMD/MIMD array having an instruction sequencer utilizing a canned routine library
US5765015A (en) * 1990-11-13 1998-06-09 International Business Machines Corporation Slide network for an array processor
US5708836A (en) * 1990-11-13 1998-01-13 International Business Machines Corporation SIMD/MIMD inter-processor communication
US5588152A (en) * 1990-11-13 1996-12-24 International Business Machines Corporation Advanced parallel processor including advanced support hardware
US5765011A (en) * 1990-11-13 1998-06-09 International Business Machines Corporation Parallel processing system having a synchronous SIMD processing with processing elements emulating SIMD operation using individual instruction streams
US5734921A (en) * 1990-11-13 1998-03-31 International Business Machines Corporation Advanced parallel array processor computer package
JP3237858B2 (ja) * 1991-01-30 2001-12-10 沖電気工業株式会社 演算装置
US5434970A (en) * 1991-02-14 1995-07-18 Cray Research, Inc. System for distributed multiprocessor communication
US5175858A (en) * 1991-03-04 1992-12-29 Adaptive Solutions, Inc. Mechanism providing concurrent computational/communications in SIMD architecture
JPH04293151A (ja) * 1991-03-20 1992-10-16 Fujitsu Ltd 並列データ処理方式
US5241492A (en) * 1991-05-06 1993-08-31 Motorola, Inc. Apparatus for performing multiply and accumulate instructions with reduced power and a method therefor
US5594918A (en) * 1991-05-13 1997-01-14 International Business Machines Corporation Parallel computer system providing multi-ported intelligent memory
JPH0520284A (ja) * 1991-07-16 1993-01-29 Matsushita Electric Ind Co Ltd パラレルプロセツサシステム
US5361370A (en) * 1991-10-24 1994-11-01 Intel Corporation Single-instruction multiple-data processor having dual-ported local memory architecture for simultaneous data transmission on local memory ports and global port
AU2939892A (en) 1991-12-06 1993-06-28 Richard S. Norman Massively-parallel direct output processor array
FR2686175B1 (fr) * 1992-01-14 1996-12-20 Andre Thepaut Systeme de traitement de donnees multiprocesseur.
US5506992A (en) * 1992-01-30 1996-04-09 Saxenmeyer; George Distributed processing system with asynchronous communication between processing modules
US6104439A (en) * 1992-02-08 2000-08-15 Samsung Electronics Co., Ltd. Method and apparatus for motion estimation
KR950014862B1 (ko) * 1992-02-08 1995-12-16 삼성전자주식회사 움직임추정방법 및 그 장치
US5991866A (en) * 1992-03-25 1999-11-23 Tm Patents, Lp Method and system for generating a program to facilitate rearrangement of address bits among addresses in a massively parallel processor system
JP2572522B2 (ja) * 1992-05-12 1997-01-16 インターナショナル・ビジネス・マシーンズ・コーポレイション コンピューティング装置
JP2642039B2 (ja) * 1992-05-22 1997-08-20 インターナショナル・ビジネス・マシーンズ・コーポレイション アレイ・プロセッサ
US5784631A (en) * 1992-06-30 1998-07-21 Discovision Associates Huffman decoder
US6047112A (en) * 1992-06-30 2000-04-04 Discovision Associates Technique for initiating processing of a data stream of encoded video information
US6263422B1 (en) 1992-06-30 2001-07-17 Discovision Associates Pipeline processing machine with interactive stages operable in response to tokens and system and methods relating thereto
US5809270A (en) * 1992-06-30 1998-09-15 Discovision Associates Inverse quantizer
US6112017A (en) * 1992-06-30 2000-08-29 Discovision Associates Pipeline processing machine having a plurality of reconfigurable processing stages interconnected by a two-wire interface bus
US6079009A (en) * 1992-06-30 2000-06-20 Discovision Associates Coding standard token in a system compromising a plurality of pipeline stages
US5768561A (en) * 1992-06-30 1998-06-16 Discovision Associates Tokens-based adaptive video processing arrangement
US6067417A (en) * 1992-06-30 2000-05-23 Discovision Associates Picture start token
US6330665B1 (en) 1992-06-30 2001-12-11 Discovision Associates Video parser
US7095783B1 (en) 1992-06-30 2006-08-22 Discovision Associates Multistandard video decoder and decompression system for processing encoded bit streams including start codes and methods relating thereto
US5428803A (en) * 1992-07-10 1995-06-27 Cray Research, Inc. Method and apparatus for a unified parallel processing architecture
US6098113A (en) * 1992-10-22 2000-08-01 Ncr Corporation Apparatus and method for address translation and allocation for a plurality of input/output (I/O) buses to a system bus
US5586281A (en) * 1992-10-27 1996-12-17 Sharp Kabushiki Kaisha Data driven type information processing apparatus
JPH06162228A (ja) * 1992-11-26 1994-06-10 Sharp Corp データフロープロセッサ装置
JPH06290158A (ja) * 1993-03-31 1994-10-18 Fujitsu Ltd 再構成可能なトーラス・ネットワーク方式
JPH0713945A (ja) * 1993-06-16 1995-01-17 Nippon Sheet Glass Co Ltd 演算処理部および制御・記憶部分離型マルチプロセッサ ・システムのバス構造
US5805914A (en) * 1993-06-24 1998-09-08 Discovision Associates Data pipeline system and data encoding method
US5861894A (en) * 1993-06-24 1999-01-19 Discovision Associates Buffer manager
US5829007A (en) * 1993-06-24 1998-10-27 Discovision Associates Technique for implementing a swing buffer in a memory array
US6462578B2 (en) 1993-08-03 2002-10-08 Btr, Inc. Architecture and interconnect scheme for programmable logic circuits
US5457410A (en) * 1993-08-03 1995-10-10 Btr, Inc. Architecture and interconnect scheme for programmable logic circuits
US6073185A (en) * 1993-08-27 2000-06-06 Teranex, Inc. Parallel data processor
US5848276A (en) * 1993-12-06 1998-12-08 Cpu Technology, Inc. High speed, direct register access operation for parallel processing units
US5485576A (en) * 1994-01-28 1996-01-16 Fee; Brendan Chassis fault tolerant system management bus architecture for a networking
MX9602687A (es) * 1994-02-23 1997-05-31 Rosemount Inc Transmisor de campo para almacenar informacion.
US6145071A (en) * 1994-03-03 2000-11-07 The George Washington University Multi-layer multi-processor information conveyor with periodic transferring of processors' states for on-the-fly transformation of continuous information flows and operating method therefor
US6408402B1 (en) 1994-03-22 2002-06-18 Hyperchip Inc. Efficient direct replacement cell fault tolerant architecture
DE69519426T2 (de) * 1994-03-22 2001-06-21 Hyperchip Inc Zellenbasierte fehlertolerante Architektur mit vorteilhafter Verwendung der nicht-zugeteilten redundanten Zellen
JP2924643B2 (ja) * 1994-05-19 1999-07-26 ヤマハ株式会社 ディジタル信号処理方法及び装置
JP3458518B2 (ja) * 1994-08-30 2003-10-20 ソニー株式会社 並列プロセッサ
KR100186918B1 (ko) * 1994-10-21 1999-05-01 모리시다 요이치 신호처리장치
US5548788A (en) * 1994-10-27 1996-08-20 Emc Corporation Disk controller having host processor controls the time for transferring data to disk drive by modifying contents of the memory to indicate data is stored in the memory
US5850564A (en) * 1995-05-03 1998-12-15 Btr, Inc, Scalable multiple level tab oriented interconnect architecture
CN1117432C (zh) 1995-05-03 2003-08-06 Btr公司 可缩放的多层互联结构
US5943242A (en) * 1995-11-17 1999-08-24 Pact Gmbh Dynamically reconfigurable data processing system
US7266725B2 (en) * 2001-09-03 2007-09-04 Pact Xpp Technologies Ag Method for debugging reconfigurable architectures
US5949440A (en) * 1996-04-30 1999-09-07 Hewlett Packard Compnay Method and apparatus for processing graphics primitives in multiple modes using reconfigurable hardware
US6003098A (en) * 1996-04-30 1999-12-14 Hewlett-Packard Company Graphic accelerator architecture using two graphics processing units for processing aspects of pre-rasterized graphics primitives and a control circuitry for relaying pass-through information
US6034547A (en) * 1996-09-04 2000-03-07 Advantage Logic, Inc. Method and apparatus for universal program controlled bus
US6624658B2 (en) * 1999-02-04 2003-09-23 Advantage Logic, Inc. Method and apparatus for universal program controlled bus architecture
DE19651075A1 (de) * 1996-12-09 1998-06-10 Pact Inf Tech Gmbh Einheit zur Verarbeitung von numerischen und logischen Operationen, zum Einsatz in Prozessoren (CPU's), Mehrrechnersystemen, Datenflußprozessoren (DFP's), digitalen Signal Prozessoren (DSP's) oder dergleichen
DE19654595A1 (de) * 1996-12-20 1998-07-02 Pact Inf Tech Gmbh I0- und Speicherbussystem für DFPs sowie Bausteinen mit zwei- oder mehrdimensionaler programmierbaren Zellstrukturen
DE19654593A1 (de) 1996-12-20 1998-07-02 Pact Inf Tech Gmbh Umkonfigurierungs-Verfahren für programmierbare Bausteine zur Laufzeit
DE19654846A1 (de) * 1996-12-27 1998-07-09 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen Umladen von Datenflußprozessoren (DFPs) sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen (FPGAs, DPGAs, o. dgl.)
ATE243390T1 (de) * 1996-12-27 2003-07-15 Pact Inf Tech Gmbh Verfahren zum selbständigen dynamischen umladen von datenflussprozessoren (dfps) sowie bausteinen mit zwei- oder mehrdimensionalen programmierbaren zellstrukturen (fpgas, dpgas, o.dgl.)
DE19704728A1 (de) * 1997-02-08 1998-08-13 Pact Inf Tech Gmbh Verfahren zur Selbstsynchronisation von konfigurierbaren Elementen eines programmierbaren Bausteines
US6542998B1 (en) * 1997-02-08 2003-04-01 Pact Gmbh Method of self-synchronization of configurable elements of a programmable module
DE19704742A1 (de) * 1997-02-11 1998-09-24 Pact Inf Tech Gmbh Internes Bussystem für DFPs, sowie Bausteinen mit zwei- oder mehrdimensionalen programmierbaren Zellstrukturen, zur Bewältigung großer Datenmengen mit hohem Vernetzungsaufwand
EP0872800B8 (de) * 1997-04-14 2005-08-10 HMS Industrial Networks AB Verfahren und Einrichtung zum Datenaustausch zwischen zwei Prozessoreinheiten
US6502180B1 (en) * 1997-09-12 2002-12-31 California Institute Of Technology Asynchronous circuits with pipelined completion process
US8686549B2 (en) 2001-09-03 2014-04-01 Martin Vorbach Reconfigurable elements
DE19861088A1 (de) * 1997-12-22 2000-02-10 Pact Inf Tech Gmbh Verfahren zur Reparatur von integrierten Schaltkreisen
US6088800A (en) 1998-02-27 2000-07-11 Mosaid Technologies, Incorporated Encryption processor with shared memory interconnect
US6067609A (en) * 1998-04-09 2000-05-23 Teranex, Inc. Pattern generation and shift plane operations for a mesh connected computer
US6173388B1 (en) 1998-04-09 2001-01-09 Teranex Inc. Directly accessing local memories of array processors for improved real-time corner turning processing
US6212628B1 (en) 1998-04-09 2001-04-03 Teranex, Inc. Mesh connected computer
US6185667B1 (en) 1998-04-09 2001-02-06 Teranex, Inc. Input/output support for processing in a mesh connected computer
JPH11353288A (ja) * 1998-06-04 1999-12-24 Toshiba Corp 並列計算機及びメモリ装置
US6513108B1 (en) 1998-06-29 2003-01-28 Cisco Technology, Inc. Programmable processing engine for efficiently processing transient data
US6173386B1 (en) 1998-12-14 2001-01-09 Cisco Technology, Inc. Parallel processor with debug capability
US6920562B1 (en) 1998-12-18 2005-07-19 Cisco Technology, Inc. Tightly coupled software protocol decode with hardware data encryption
US7107612B1 (en) * 1999-04-01 2006-09-12 Juniper Networks, Inc. Method, apparatus and computer program product for a network firewall
US6701432B1 (en) * 1999-04-01 2004-03-02 Netscreen Technologies, Inc. Firewall including local bus
GB9911890D0 (en) * 1999-05-22 1999-07-21 Lucas Ind Plc Method and apparatus for detecting a fault condition in a computer processor
AU5805300A (en) 1999-06-10 2001-01-02 Pact Informationstechnologie Gmbh Sequence partitioning in cell structures
US6728863B1 (en) 1999-10-26 2004-04-27 Assabet Ventures Wide connections for transferring data between PE's of an N-dimensional mesh-connected SIMD array while transferring operands from memory
WO2001035224A1 (en) 1999-10-26 2001-05-17 Arthur D. Little, Inc. Bit-serial memory access with wide processing elements for simd arrays
US6529983B1 (en) 1999-11-03 2003-03-04 Cisco Technology, Inc. Group and virtual locking mechanism for inter processor synchronization
US6584581B1 (en) * 1999-12-06 2003-06-24 Ab Initio Software Corporation Continuous flow checkpointing data processing
US6320412B1 (en) 1999-12-20 2001-11-20 Btr, Inc. C/O Corporate Trust Co. Architecture and interconnect for programmable logic circuits
US6892237B1 (en) 2000-03-28 2005-05-10 Cisco Technology, Inc. Method and apparatus for high-speed parsing of network messages
US6505269B1 (en) 2000-05-16 2003-01-07 Cisco Technology, Inc. Dynamic addressing mapping to eliminate memory resource contention in a symmetric multiprocessor system
EP1342158B1 (de) 2000-06-13 2010-08-04 Richter, Thomas Pipeline ct-protokolle und -kommunikation
US6754801B1 (en) * 2000-08-22 2004-06-22 Micron Technology, Inc. Method and apparatus for a shift register based interconnection for a massively parallel processor array
US20040015899A1 (en) * 2000-10-06 2004-01-22 Frank May Method for processing data
US7595659B2 (en) 2000-10-09 2009-09-29 Pact Xpp Technologies Ag Logic cell array and bus system
US8058899B2 (en) * 2000-10-06 2011-11-15 Martin Vorbach Logic cell array and bus system
GB2370380B (en) 2000-12-19 2003-12-31 Picochip Designs Ltd Processor architecture
US6990555B2 (en) 2001-01-09 2006-01-24 Pact Xpp Technologies Ag Method of hierarchical caching of configuration data having dataflow processors and modules having two- or multidimensional programmable cell structure (FPGAs, DPGAs, etc.)
US9037807B2 (en) * 2001-03-05 2015-05-19 Pact Xpp Technologies Ag Processor arrangement on a chip including data processing, memory, and interface elements
US7844796B2 (en) * 2001-03-05 2010-11-30 Martin Vorbach Data processing device and method
US20090300262A1 (en) * 2001-03-05 2009-12-03 Martin Vorbach Methods and devices for treating and/or processing data
US7581076B2 (en) 2001-03-05 2009-08-25 Pact Xpp Technologies Ag Methods and devices for treating and/or processing data
US7444531B2 (en) * 2001-03-05 2008-10-28 Pact Xpp Technologies Ag Methods and devices for treating and processing data
US20090210653A1 (en) * 2001-03-05 2009-08-20 Pact Xpp Technologies Ag Method and device for treating and processing data
US7210129B2 (en) 2001-08-16 2007-04-24 Pact Xpp Technologies Ag Method for translating programs for reconfigurable architectures
US7657877B2 (en) * 2001-06-20 2010-02-02 Pact Xpp Technologies Ag Method for processing data
US7996827B2 (en) 2001-08-16 2011-08-09 Martin Vorbach Method for the translation of programs for reconfigurable architectures
US7434191B2 (en) * 2001-09-03 2008-10-07 Pact Xpp Technologies Ag Router
US8686475B2 (en) 2001-09-19 2014-04-01 Pact Xpp Technologies Ag Reconfigurable elements
US7577822B2 (en) * 2001-12-14 2009-08-18 Pact Xpp Technologies Ag Parallel task operation in processor and reconfigurable coprocessor configured based on information in link list including termination information for synchronization
WO2003071418A2 (de) * 2002-01-18 2003-08-28 Pact Xpp Technologies Ag Übersetzungsverfahren
EP1483682A2 (de) * 2002-01-19 2004-12-08 PACT XPP Technologies AG Reconfigurierbarer prozessor
EP2043000B1 (de) 2002-02-18 2011-12-21 Richter, Thomas Bussysteme und Rekonfigurationsverfahren
US8914590B2 (en) * 2002-08-07 2014-12-16 Pact Xpp Technologies Ag Data processing method and device
WO2003081454A2 (de) * 2002-03-21 2003-10-02 Pact Xpp Technologies Ag Verfahren und vorrichtung zur datenverarbeitung
US7447872B2 (en) * 2002-05-30 2008-11-04 Cisco Technology, Inc. Inter-chip processor control plane communication
US7415594B2 (en) 2002-06-26 2008-08-19 Coherent Logix, Incorporated Processing system with interspersed stall propagating processors and communication elements
US7657861B2 (en) * 2002-08-07 2010-02-02 Pact Xpp Technologies Ag Method and device for processing data
AU2003286131A1 (en) * 2002-08-07 2004-03-19 Pact Xpp Technologies Ag Method and device for processing data
US20110238948A1 (en) * 2002-08-07 2011-09-29 Martin Vorbach Method and device for coupling a data processing unit and a data processing array
JP4388895B2 (ja) 2002-09-06 2009-12-24 ペーアーツェーテー イクスペーペー テクノロジーズ アクチエンゲゼルシャフト リコンフィギュアラブルなシーケンサ構造
US7167850B2 (en) * 2002-10-10 2007-01-23 Ab Initio Software Corporation Startup and control of graph-based computation
GB2397668B (en) * 2003-01-27 2005-12-07 Picochip Designs Ltd Processor array
GB2400195B (en) * 2003-03-31 2005-06-29 Micron Technology Inc Active memory processing array topography and method
DE112004000026D2 (de) * 2003-04-04 2006-06-14 Pact Xpp Technologies Ag Verfahren und Vorrichtung für die Datenverarbeitung
US7255437B2 (en) * 2003-10-09 2007-08-14 Howell Thomas A Eyeglasses with activity monitoring
US7457234B1 (en) 2003-05-14 2008-11-25 Adtran, Inc. System and method for protecting communication between a central office and a remote premises
US20040255096A1 (en) * 2003-06-11 2004-12-16 Norman Richard S. Method for continuous linear production of integrated circuits
GB2402760B (en) * 2003-06-12 2006-01-11 Advanced Risc Mach Ltd Improvements in flexibility of use of a data processing apparatus
EP1634182A2 (de) * 2003-06-17 2006-03-15 PACT XPP Technologies AG Datenverarbeitungseinrichtung und verfahren
US7130986B2 (en) * 2003-06-30 2006-10-31 Intel Corporation Determining if a register is ready to exchange data with a processing element
EP1676208A2 (de) * 2003-08-28 2006-07-05 PACT XPP Technologies AG Datenverarbeitungseinrichtung und verfahren
US7577824B2 (en) * 2003-09-08 2009-08-18 Altera Corporation Methods and apparatus for storing expanded width instructions in a VLIW memory for deferred execution
US6975139B2 (en) * 2004-03-30 2005-12-13 Advantage Logic, Inc. Scalable non-blocking switching network for programmable logic
US7320064B2 (en) * 2004-07-23 2008-01-15 Honeywell International Inc. Reconfigurable computing architecture for space applications
US7460529B2 (en) * 2004-07-29 2008-12-02 Advantage Logic, Inc. Interconnection fabric using switching networks in hierarchy
US7779177B2 (en) * 2004-08-09 2010-08-17 Arches Computing Systems Multi-processor reconfigurable computing system
US20090031104A1 (en) * 2005-02-07 2009-01-29 Martin Vorbach Low Latency Massive Parallel Data Processing Device
US7478222B2 (en) * 2005-03-29 2009-01-13 Karl M. Fant Programmable pipeline array
US7877350B2 (en) 2005-06-27 2011-01-25 Ab Initio Technology Llc Managing metadata for graph-based computations
US8560795B2 (en) * 2005-06-30 2013-10-15 Imec Memory arrangement for multi-processor systems including a memory queue
FR2888349A1 (fr) * 2005-07-06 2007-01-12 St Microelectronics Sa Adaptation de debit binaire dans un flot de traitement de donnees
US20070046781A1 (en) * 2005-08-29 2007-03-01 Honeywell International Inc. Systems and methods for processing digital video data
WO2007062327A2 (en) * 2005-11-18 2007-05-31 Ideal Industries, Inc. Releasable wire connector
EP1974265A1 (de) 2006-01-18 2008-10-01 PACT XPP Technologies AG Hardwaredefinitionsverfahren
US7423453B1 (en) 2006-01-20 2008-09-09 Advantage Logic, Inc. Efficient integrated circuit layout scheme to implement a scalable switching network used in interconnection fabric
US8826228B2 (en) * 2006-03-27 2014-09-02 Coherent Logix, Incorporated Programming a multi-processor system
AU2007286155B2 (en) 2006-08-10 2013-12-12 Ab Initio Technology Llc. Distributing services in graph-based computations
EP1978449A2 (de) * 2007-04-06 2008-10-08 Technology Properties Limited Signalverarbeitung
KR101635945B1 (ko) 2007-07-26 2016-07-04 아브 이니티오 테크놀로지 엘엘시 에러 핸들링이 가능한 그래프 기반의 트랜잭션 연산 처리 방법 및 시스템
GB2454865B (en) * 2007-11-05 2012-06-13 Picochip Designs Ltd Power control
US8078829B2 (en) * 2007-12-12 2011-12-13 Itt Manufacturing Enterprises, Inc. Scaleable array of micro-engines for waveform processing
US8078839B2 (en) * 2007-12-13 2011-12-13 Wave Semiconductor Concurrent processing element system, and method
GB2466661B (en) * 2009-01-05 2014-11-26 Intel Corp Rake receiver
CN105843684B (zh) * 2009-02-13 2020-03-03 起元技术有限责任公司 管理任务执行
GB2470037B (en) 2009-05-07 2013-07-10 Picochip Designs Ltd Methods and devices for reducing interference in an uplink
GB2470891B (en) 2009-06-05 2013-11-27 Picochip Designs Ltd A method and device in a communication network
GB2470771B (en) 2009-06-05 2012-07-18 Picochip Designs Ltd A method and device in a communication network
US7999570B2 (en) * 2009-06-24 2011-08-16 Advantage Logic, Inc. Enhanced permutable switching network with multicasting signals for interconnection fabric
US8667329B2 (en) * 2009-09-25 2014-03-04 Ab Initio Technology Llc Processing transactions in graph-based applications
GB2474071B (en) 2009-10-05 2013-08-07 Picochip Designs Ltd Femtocell base station
JP5708634B2 (ja) * 2010-02-24 2015-04-30 日本電気株式会社 Simdプロセッサ
AU2011268459B2 (en) 2010-06-15 2014-09-18 Ab Initio Technology Llc Dynamically loading graph-based computations
GB2482869B (en) 2010-08-16 2013-11-06 Picochip Designs Ltd Femtocell access control
EP3432152B1 (de) 2010-10-15 2020-03-18 Coherent Logix Incorporated Deaktivierung von kommunikation in einem multiprozessorsystem
US8924455B1 (en) * 2011-02-25 2014-12-30 Xilinx, Inc. Multiplication of matrices using systolic arrays
GB2489716B (en) 2011-04-05 2015-06-24 Intel Corp Multimode base system
GB2489919B (en) 2011-04-05 2018-02-14 Intel Corp Filter
GB2491098B (en) 2011-05-16 2015-05-20 Intel Corp Accessing a base station
US10108521B2 (en) 2012-11-16 2018-10-23 Ab Initio Technology Llc Dynamic component performance monitoring
US9507682B2 (en) 2012-11-16 2016-11-29 Ab Initio Technology Llc Dynamic graph performance monitoring
US9274926B2 (en) 2013-01-03 2016-03-01 Ab Initio Technology Llc Configurable testing of computer programs
US10180821B2 (en) 2013-12-05 2019-01-15 Ab Initio Technology Llc Managing interfaces for sub-graphs
US10657134B2 (en) 2015-08-05 2020-05-19 Ab Initio Technology Llc Selecting queries for execution on a stream of real-time data
SG11201803929YA (en) 2015-12-21 2018-06-28 Ab Initio Technology Llc Sub-graph interface generation
EP3526683B1 (de) * 2017-05-17 2020-08-19 Google LLC Matrixmultipliziereinheit mit niedriger latenz
US11656849B2 (en) 2019-08-14 2023-05-23 Vorticity Inc. Dedicated hardware system for solving partial differential equations
US11403070B2 (en) * 2019-08-19 2022-08-02 Vorticity Inc. Systolic array design for solving partial differential equations
US11921813B2 (en) 2019-08-20 2024-03-05 Vorticity Inc. Methods for utilizing solver hardware for solving partial differential equations

Family Cites Families (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3737866A (en) * 1971-07-27 1973-06-05 Data General Corp Data storage and retrieval system
US3848234A (en) * 1973-04-04 1974-11-12 Sperry Rand Corp Multi-processor system with multiple cache memories
US4065808A (en) * 1975-01-25 1977-12-27 U.S. Philips Corporation Network computer system
US4065809A (en) * 1976-05-27 1977-12-27 Tokyo Shibaura Electric Co., Ltd. Multi-processing system for controlling microcomputers and memories
US4309691A (en) * 1978-02-17 1982-01-05 California Institute Of Technology Step-oriented pipeline data processing system
US4184200A (en) * 1978-04-26 1980-01-15 Sperry Rand Corporation Integrating I/O element
NL8002787A (nl) * 1980-05-14 1981-12-16 Philips Nv Multiprocessor-rekenmachinesysteem voor het uitvoeren van een recursief algorithme.
JPS56164464A (en) * 1980-05-21 1981-12-17 Tatsuo Nogi Parallel processing computer
US4524455A (en) * 1981-06-01 1985-06-18 Environmental Research Inst. Of Michigan Pipeline processor
JPS6053349B2 (ja) * 1981-06-19 1985-11-25 株式会社日立製作所 画像処理プロセツサ
US4533993A (en) * 1981-08-18 1985-08-06 National Research Development Corp. Multiple processing cell digital data processor
US4495567A (en) * 1981-10-15 1985-01-22 Codex Corporation Multiprocessor/multimemory control system
US4524428A (en) * 1982-01-26 1985-06-18 Hughes Aircraft Company Modular input-programmable logic circuits for use in a modular array processor
US4507726A (en) * 1982-01-26 1985-03-26 Hughes Aircraft Company Array processor architecture utilizing modular elemental processors
US4543642A (en) * 1982-01-26 1985-09-24 Hughes Aircraft Company Data Exchange Subsystem for use in a modular array processor
US4498134A (en) * 1982-01-26 1985-02-05 Hughes Aircraft Company Segregator functional plane for use in a modular array processor
US4574350A (en) * 1982-05-19 1986-03-04 At&T Bell Laboratories Shared resource locking apparatus
US4509187A (en) * 1982-06-14 1985-04-02 At&T Bell Laboratories Time warp signal recognition processor using recirculating and/or reduced array of processor cells
US4489381A (en) * 1982-08-06 1984-12-18 International Business Machines Corporation Hierarchical memories having two ports at each subordinate memory level
US4553203A (en) * 1982-09-28 1985-11-12 Trw Inc. Easily schedulable horizontal computer
US4680698A (en) * 1982-11-26 1987-07-14 Inmos Limited High density ROM in separate isolation well on single with chip
US4600992A (en) * 1982-12-14 1986-07-15 Honeywell Information Systems Inc. Priority resolver with lowest priority level having shortest logic path
US4644496A (en) * 1983-01-11 1987-02-17 Iowa State University Research Foundation, Inc. Apparatus, methods, and systems for computer information transfer
US4580215A (en) * 1983-03-08 1986-04-01 Itt Corporation Associative array with five arithmetic paths
US4636942A (en) * 1983-04-25 1987-01-13 Cray Research, Inc. Computer vector multiprocessing control
US4591980A (en) * 1984-02-16 1986-05-27 Xerox Corporation Adaptive self-repairing processor array

Also Published As

Publication number Publication date
US4720780A (en) 1988-01-19
KR970001899B1 (ko) 1997-02-18
WO1987001841A1 (en) 1987-03-26
KR880011681A (ko) 1988-10-29
EP0237571A4 (de) 1989-02-22
US4922418A (en) 1990-05-01
EP0237571A1 (de) 1987-09-23
EP0237571B1 (de) 1992-04-29
JPS63501530A (ja) 1988-06-09

Similar Documents

Publication Publication Date Title
DE3685107D1 (de) Speicherverbunder wellenfront-feldprozessor.
DE68917181T2 (de) Speicherkartensteckverbinder.
DE3587116D1 (de) Datenprozessor.
NO892227D0 (no) Loddefritt elektrisk koblingsstykke.
IT8620235A0 (it) Connettore subaqueo.
DE3689389D1 (de) Datenverarbeitungsprozessor.
DE3676398D1 (de) Steckverbinderzusammenbau.
DE3585866D1 (de) Koaxialverbindungsstueck.
DE3750704D1 (de) Datenprozessor.
DE3672333D1 (de) Starkstromanschlussklemme.
DE3574824D1 (de) Quetschverbinder.
DE68918145D1 (de) Kartensteckverbinder.
BR8601633A (pt) Conector de aterramento
DE3764942D1 (de) Verbinderstecker.
NO864632D0 (no) Sambandskopling.
DE58902286D1 (de) Steckkupplung.
DE68916441T2 (de) Verbindungsstücke.
DK615586D0 (da) Forbindelseshus
DE3682460D1 (de) Datenprozessor.
DE3650069D1 (de) Datenprozessor.
ES268638Y (es) Conector.
DE3782711T2 (de) Steckverbindung.
DE58908360D1 (de) Steckverbindersatz.
DE297925T1 (de) Erdungsstecker.
NO169263C (no) Elektrisk koblingsanordning.

Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee