DE3650573D1 - Leitfähigkeitsmodulations-Halbleiteranordnung und Verfahren zu ihrer Herstellung - Google Patents

Leitfähigkeitsmodulations-Halbleiteranordnung und Verfahren zu ihrer Herstellung

Info

Publication number
DE3650573D1
DE3650573D1 DE3650573T DE3650573T DE3650573D1 DE 3650573 D1 DE3650573 D1 DE 3650573D1 DE 3650573 T DE3650573 T DE 3650573T DE 3650573 T DE3650573 T DE 3650573T DE 3650573 D1 DE3650573 D1 DE 3650573D1
Authority
DE
Germany
Prior art keywords
manufacture
semiconductor device
conductivity modulation
modulation semiconductor
conductivity
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE3650573T
Other languages
English (en)
Other versions
DE3650573T2 (de
Inventor
Makoto C O Patent Di Hideshima
Wataru C O Patent Di Takahashi
Masashi C O Patent Di Kuwahara
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE3650573D1 publication Critical patent/DE3650573D1/de
Publication of DE3650573T2 publication Critical patent/DE3650573T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66325—Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
    • H01L29/66333—Vertical insulated gate bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H01L21/187—Joining of semiconductor bodies for junction formation by direct bonding
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
    • H01L29/0834—Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7395—Vertical transistors, e.g. vertical IGBT
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/012—Bonding, e.g. electrostatic for strain gauges
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/914—Doping
    • Y10S438/919—Compensation doping

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Bipolar Transistors (AREA)
  • Junction Field-Effect Transistors (AREA)
DE3650573T 1985-02-20 1986-02-18 Leitfähigkeitsmodulations-Halbleiteranordnung und Verfahren zu ihrer Herstellung Expired - Lifetime DE3650573T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP60030577A JPS61191071A (ja) 1985-02-20 1985-02-20 伝導度変調型半導体装置及びその製造方法

Publications (2)

Publication Number Publication Date
DE3650573D1 true DE3650573D1 (de) 1996-10-31
DE3650573T2 DE3650573T2 (de) 1997-03-06

Family

ID=12307706

Family Applications (2)

Application Number Title Priority Date Filing Date
DE3650573T Expired - Lifetime DE3650573T2 (de) 1985-02-20 1986-02-18 Leitfähigkeitsmodulations-Halbleiteranordnung und Verfahren zu ihrer Herstellung
DE8686102047T Expired - Lifetime DE3680352D1 (de) 1985-02-20 1986-02-18 Leitfaehigkeitsmodulations-halbleiteranordnung und verfahren zu ihrer herstellung.

Family Applications After (1)

Application Number Title Priority Date Filing Date
DE8686102047T Expired - Lifetime DE3680352D1 (de) 1985-02-20 1986-02-18 Leitfaehigkeitsmodulations-halbleiteranordnung und verfahren zu ihrer herstellung.

Country Status (4)

Country Link
US (1) US5128277A (de)
EP (2) EP0192229B1 (de)
JP (1) JPS61191071A (de)
DE (2) DE3650573T2 (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2633536B2 (ja) * 1986-11-05 1997-07-23 株式会社東芝 接合型半導体基板の製造方法
JPH07107935B2 (ja) * 1988-02-04 1995-11-15 株式会社東芝 半導体装置
JPH0691263B2 (ja) * 1988-10-19 1994-11-14 株式会社東芝 半導体装置の製造方法
JPH02312280A (ja) * 1989-05-26 1990-12-27 Mitsubishi Electric Corp 絶縁ゲート型バイポーラトランジスタ
JPH07263721A (ja) * 1994-03-25 1995-10-13 Nippondenso Co Ltd 半導体装置及びその製造方法
EP1062692A1 (de) * 1998-03-09 2000-12-27 Harris Corporation Durch direktes niedertemperaturbonden hergestellte anordnungen
US6274892B1 (en) 1998-03-09 2001-08-14 Intersil Americas Inc. Devices formable by low temperature direct bonding
JP3906076B2 (ja) * 2001-01-31 2007-04-18 株式会社東芝 半導体装置
US8232558B2 (en) 2008-05-21 2012-07-31 Cree, Inc. Junction barrier Schottky diodes with current surge capability
US9117739B2 (en) 2010-03-08 2015-08-25 Cree, Inc. Semiconductor devices with heterojunction barrier regions and methods of fabricating same
US8618582B2 (en) 2011-09-11 2013-12-31 Cree, Inc. Edge termination structure employing recesses for edge termination elements
US8664665B2 (en) 2011-09-11 2014-03-04 Cree, Inc. Schottky diode employing recesses for elements of junction barrier array
US8680587B2 (en) 2011-09-11 2014-03-25 Cree, Inc. Schottky diode

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3312880A (en) * 1962-12-12 1967-04-04 Sylvania Electric Prod Four-layer semiconductor switching device having turn-on and turn-off gain
US3324359A (en) * 1963-09-30 1967-06-06 Gen Electric Four layer semiconductor switch with the third layer defining a continuous, uninterrupted internal junction
DE1514727A1 (de) * 1965-09-30 1969-06-19 Schaefer Dipl Phys Siegfried Herstellung von pn-UEbergaengen durch plastische Verformung von Halbleitern
US3659334A (en) * 1970-10-13 1972-05-02 Rca Corp High power high frequency device
JPS4843590A (de) * 1971-10-04 1973-06-23
DE2926734C2 (de) * 1979-07-03 1982-09-09 Licentia Patent-Verwaltungs-Gmbh, 6000 Frankfurt Thyristor mit einem durch plastische Verformung erzeugten pn-Übergang und Verfahren zu einer Herstellung
US4364073A (en) * 1980-03-25 1982-12-14 Rca Corporation Power MOSFET with an anode region
US4383268A (en) * 1980-07-07 1983-05-10 Rca Corporation High-current, high-voltage semiconductor devices having a metallurgical grade substrate
SE8107136L (sv) * 1980-12-02 1982-06-03 Gen Electric Styrelektrodforsedd likriktaranordning
US4587713A (en) * 1984-02-22 1986-05-13 Rca Corporation Method for making vertical MOSFET with reduced bipolar effects
EP0161740B1 (de) * 1984-05-09 1991-06-12 Kabushiki Kaisha Toshiba Verfahren zur Herstellung eines Halbleitersubstrates
US4631564A (en) * 1984-10-23 1986-12-23 Rca Corporation Gate shield structure for power MOS device
JPH0770474B2 (ja) * 1985-02-08 1995-07-31 株式会社東芝 化合物半導体装置の製造方法
US4639754A (en) * 1985-02-25 1987-01-27 Rca Corporation Vertical MOSFET with diminished bipolar effects
JPS6350013A (ja) * 1986-08-20 1988-03-02 Meidensha Electric Mfg Co Ltd 半導体素子の製造方法
JP2579979B2 (ja) * 1987-02-26 1997-02-12 株式会社東芝 半導体素子の製造方法

Also Published As

Publication number Publication date
EP0406916A2 (de) 1991-01-09
EP0192229A3 (en) 1987-03-25
EP0406916B1 (de) 1996-09-25
EP0192229B1 (de) 1991-07-24
DE3650573T2 (de) 1997-03-06
EP0192229A2 (de) 1986-08-27
DE3680352D1 (de) 1991-08-29
US5128277A (en) 1992-07-07
JPS61191071A (ja) 1986-08-25
JPH0544835B2 (de) 1993-07-07
EP0406916A3 (en) 1991-08-28

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