DE3584985D1 - Phasensynchronisierungsschaltung. - Google Patents

Phasensynchronisierungsschaltung.

Info

Publication number
DE3584985D1
DE3584985D1 DE8585400616T DE3584985T DE3584985D1 DE 3584985 D1 DE3584985 D1 DE 3584985D1 DE 8585400616 T DE8585400616 T DE 8585400616T DE 3584985 T DE3584985 T DE 3584985T DE 3584985 D1 DE3584985 D1 DE 3584985D1
Authority
DE
Germany
Prior art keywords
synchronization circuit
phase synchronization
phase
circuit
synchronization
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE8585400616T
Other languages
English (en)
Inventor
Haruhiko Nakamura
Junya Tempaku
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Application granted granted Critical
Publication of DE3584985D1 publication Critical patent/DE3584985D1/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • H03L7/06Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08Details of the phase-locked loop
    • H03L7/081Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L7/00Arrangements for synchronising receiver with transmitter
    • H04L7/02Speed or phase control by the received code signals, the signals containing no special synchronisation information
    • H04L7/033Speed or phase control by the received code signals, the signals containing no special synchronisation information using the transitions of the received signal to control the phase of the synchronising-signal-generating means, e.g. using a phase-locked loop
    • H04L7/0337Selecting between two or more discretely delayed clocks or selecting between two or more discretely delayed received code signals
DE8585400616T 1984-03-29 1985-03-29 Phasensynchronisierungsschaltung. Expired - Fee Related DE3584985D1 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59059466A JPS60204121A (ja) 1984-03-29 1984-03-29 位相同期回路

Publications (1)

Publication Number Publication Date
DE3584985D1 true DE3584985D1 (de) 1992-02-06

Family

ID=13114112

Family Applications (1)

Application Number Title Priority Date Filing Date
DE8585400616T Expired - Fee Related DE3584985D1 (de) 1984-03-29 1985-03-29 Phasensynchronisierungsschaltung.

Country Status (4)

Country Link
US (1) US4713621A (de)
EP (1) EP0157701B1 (de)
JP (1) JPS60204121A (de)
DE (1) DE3584985D1 (de)

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US5066868A (en) * 1990-08-13 1991-11-19 Thomson Consumer Electronics, Inc. Apparatus for generating phase shifted clock signals
US5107264A (en) * 1990-09-26 1992-04-21 International Business Machines Corporation Digital frequency multiplication and data serialization circuits
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US5291070A (en) * 1991-01-28 1994-03-01 Advanced Micro Devices, Inc. Microprocessor synchronous timing system
JPH04298116A (ja) * 1991-03-27 1992-10-21 Toshiba Corp サンプリング信号発生回路
US5272390A (en) * 1991-09-23 1993-12-21 Digital Equipment Corporation Method and apparatus for clock skew reduction through absolute delay regulation
US5245231A (en) * 1991-12-30 1993-09-14 Dell Usa, L.P. Integrated delay line
US5534808A (en) * 1992-01-31 1996-07-09 Konica Corporation Signal delay method, signal delay device and circuit for use in the apparatus
JP3381938B2 (ja) * 1992-06-05 2003-03-04 株式会社東芝 入力遷移検知パルス発生回路
SE515076C2 (sv) * 1992-07-01 2001-06-05 Ericsson Telefon Ab L M Multiplexor-/demultiplexorkrets
US5404437A (en) * 1992-11-10 1995-04-04 Sigma Designs, Inc. Mixing of computer graphics and animation sequences
JP3247190B2 (ja) * 1993-04-13 2002-01-15 三菱電機株式会社 位相同期回路および集積回路装置
US5587675A (en) * 1993-08-12 1996-12-24 At&T Global Information Solutions Company Multiclock controller
US5515107A (en) * 1994-03-30 1996-05-07 Sigma Designs, Incorporated Method of encoding a stream of motion picture data
US5598576A (en) 1994-03-30 1997-01-28 Sigma Designs, Incorporated Audio output device having digital signal processor for responding to commands issued by processor by emulating designated functions according to common command interface
JP2830735B2 (ja) * 1994-04-19 1998-12-02 日本電気株式会社 位相同期型タイミング発生回路
JP3553639B2 (ja) * 1994-05-12 2004-08-11 アジレント・テクノロジーズ・インク タイミング調整回路
US5689530A (en) * 1994-06-22 1997-11-18 Alcatel Network Systems, Inc. Data recovery circuit with large retime margin
US5592519A (en) * 1994-06-22 1997-01-07 Alcatel Network Systems, Inc. Dual frequency clock recovery using common multitap line
US5528309A (en) 1994-06-28 1996-06-18 Sigma Designs, Incorporated Analog video chromakey mixer
US6124897A (en) 1996-09-30 2000-09-26 Sigma Designs, Inc. Method and apparatus for automatic calibration of analog video chromakey mixer
JP3461944B2 (ja) * 1994-12-26 2003-10-27 富士通株式会社 パルス信号整形回路
US6239627B1 (en) * 1995-01-03 2001-05-29 Via-Cyrix, Inc. Clock multiplier using nonoverlapping clock pulses for waveform generation
WO1997005739A1 (en) * 1995-08-01 1997-02-13 Auravision Corporation Transition aligned video synchronization system
US5663767A (en) * 1995-10-25 1997-09-02 Thomson Consumer Electronics, Inc. Clock re-timing apparatus with cascaded delay stages
US5945861A (en) * 1995-12-18 1999-08-31 Lg Semicon., Co. Ltd. Clock signal modeling circuit with negative delay
KR0179779B1 (ko) * 1995-12-18 1999-04-01 문정환 클럭신호 모델링 회로
US5719511A (en) * 1996-01-31 1998-02-17 Sigma Designs, Inc. Circuit for generating an output signal synchronized to an input signal
US6128726A (en) 1996-06-04 2000-10-03 Sigma Designs, Inc. Accurate high speed digital signal processor
US5818468A (en) * 1996-06-04 1998-10-06 Sigma Designs, Inc. Decoding video signals at high speed using a memory buffer
US5959481A (en) * 1997-02-18 1999-09-28 Rambus Inc. Bus driver circuit including a slew rate indicator circuit having a one shot circuit
US6154079A (en) * 1997-06-12 2000-11-28 Lg Semicon Co., Ltd. Negative delay circuit operable in wide band frequency
US6184936B1 (en) 1997-10-06 2001-02-06 Sigma Designs, Inc. Multi-function USB capture chip using bufferless data compression
US6690834B1 (en) 1999-01-22 2004-02-10 Sigma Designs, Inc. Compression of pixel data
US6675297B1 (en) 1999-03-01 2004-01-06 Sigma Designs, Inc. Method and apparatus for generating and using a tamper-resistant encryption key
US6687770B1 (en) 1999-03-08 2004-02-03 Sigma Designs, Inc. Controlling consumption of time-stamped information by a buffered system
CA2270516C (en) 1999-04-30 2009-11-17 Mosaid Technologies Incorporated Frequency-doubling delay locked loop
GB2349755B (en) * 1999-05-07 2003-05-14 Synectix Ltd Clock signal generator
US6654956B1 (en) 2000-04-10 2003-11-25 Sigma Designs, Inc. Method, apparatus and computer program product for synchronizing presentation of digital video data with serving of digital video data
US6441666B1 (en) * 2000-07-20 2002-08-27 Silicon Graphics, Inc. System and method for generating clock signals
US6704882B2 (en) 2001-01-22 2004-03-09 Mayo Foundation For Medical Education And Research Data bit-to-clock alignment circuit with first bit capture capability
US7120215B2 (en) * 2001-12-12 2006-10-10 Via Technologies, Inc. Apparatus and method for on-chip jitter measurement
US7680618B2 (en) * 2007-09-28 2010-03-16 Tektronix, Inc. Random edge calibration of oversampling digital acquisition system

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US3024417A (en) * 1960-01-07 1962-03-06 Collins Radio Co Proportional digital synchronizer
FR1277331A (fr) * 1960-10-17 1961-12-01 Central De Telecomm Sa Lab Perfectionnements aux dispositifs de régénération d'impulsions
US3502991A (en) * 1967-06-19 1970-03-24 Bell Telephone Labor Inc Signal generator with asynchronous start
US3624519A (en) * 1969-11-10 1971-11-30 Westinghouse Electric Corp Tapped delay line timing circuit
US4061975A (en) * 1973-04-11 1977-12-06 Nippon Steel Corporation Receiver for pulses of different widths
FR2313827A1 (fr) * 1975-06-02 1976-12-31 Materiel Telephonique Systeme de transmission de suites d'elements binaires
US4023110A (en) * 1975-12-04 1977-05-10 The United States Of America As Represented By The Secretary Of The Army Pulse comparison system
FR2459585A1 (fr) * 1979-06-20 1981-01-09 Thomson Csf Procede et dispositif pour l'affinage de la remise en phase d'une horloge locale
NL183214C (nl) * 1980-01-31 1988-08-16 Philips Nv Inrichting voor het synchroniseren van de fase van een lokaal opgewekt kloksignaal met de fase van een ingangssignaal.
JPS58202680A (ja) * 1982-05-21 1983-11-25 Toshiba Corp 位相同期回路
EP0180450B1 (de) * 1984-10-31 1991-05-22 Rca Licensing Corporation Fernsehanzeigeanordnung umfassend einen Zeichengenerator mit einem nicht mit der Zeilenfrequenz synchronisierten Taktgeber

Also Published As

Publication number Publication date
EP0157701B1 (de) 1991-12-27
EP0157701A3 (en) 1987-09-09
JPS60204121A (ja) 1985-10-15
US4713621A (en) 1987-12-15
EP0157701A2 (de) 1985-10-09

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee